14e98e3e1Schristos /* Contributed by Jon Beniston <jon@beniston.com> 24e98e3e1Schristos 3*88241920Schristos Copyright (C) 2009-2024 Free Software Foundation, Inc. 44e98e3e1Schristos 54e98e3e1Schristos This file is part of GDB. 64e98e3e1Schristos 74e98e3e1Schristos This program is free software; you can redistribute it and/or modify 84e98e3e1Schristos it under the terms of the GNU General Public License as published by 94e98e3e1Schristos the Free Software Foundation; either version 3 of the License, or 104e98e3e1Schristos (at your option) any later version. 114e98e3e1Schristos 124e98e3e1Schristos This program is distributed in the hope that it will be useful, 134e98e3e1Schristos but WITHOUT ANY WARRANTY; without even the implied warranty of 144e98e3e1Schristos MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 154e98e3e1Schristos GNU General Public License for more details. 164e98e3e1Schristos 174e98e3e1Schristos You should have received a copy of the GNU General Public License 184e98e3e1Schristos along with this program. If not, see <http://www.gnu.org/licenses/>. */ 194e98e3e1Schristos 204e98e3e1Schristos #ifndef LM32_SIM_H 214e98e3e1Schristos #define LM32_SIM_H 224e98e3e1Schristos 23*88241920Schristos #include "sim/sim-lm32.h" 244e98e3e1Schristos 254e98e3e1Schristos /* CSRs. */ 264e98e3e1Schristos #define LM32_CSR_IE 0 274e98e3e1Schristos #define LM32_CSR_IM 1 284e98e3e1Schristos #define LM32_CSR_IP 2 294e98e3e1Schristos #define LM32_CSR_ICC 3 304e98e3e1Schristos #define LM32_CSR_DCC 4 314e98e3e1Schristos #define LM32_CSR_CC 5 324e98e3e1Schristos #define LM32_CSR_CFG 6 334e98e3e1Schristos #define LM32_CSR_EBA 7 344e98e3e1Schristos #define LM32_CSR_DC 8 354e98e3e1Schristos #define LM32_CSR_DEBA 9 364e98e3e1Schristos #define LM32_CSR_JTX 0xe 374e98e3e1Schristos #define LM32_CSR_JRX 0xf 384e98e3e1Schristos #define LM32_CSR_BP0 0x10 394e98e3e1Schristos #define LM32_CSR_BP1 0x11 404e98e3e1Schristos #define LM32_CSR_BP2 0x12 414e98e3e1Schristos #define LM32_CSR_BP3 0x13 424e98e3e1Schristos #define LM32_CSR_WP0 0x18 434e98e3e1Schristos #define LM32_CSR_WP1 0x19 444e98e3e1Schristos #define LM32_CSR_WP2 0x1a 454e98e3e1Schristos #define LM32_CSR_WP3 0x1b 464e98e3e1Schristos 474e98e3e1Schristos /* Exception IDs. */ 484e98e3e1Schristos #define LM32_EID_RESET 0 494e98e3e1Schristos #define LM32_EID_BREAKPOINT 1 504e98e3e1Schristos #define LM32_EID_INSTRUCTION_BUS_ERROR 2 514e98e3e1Schristos #define LM32_EID_WATCHPOINT 3 524e98e3e1Schristos #define LM32_EID_DATA_BUS_ERROR 4 534e98e3e1Schristos #define LM32_EID_DIVIDE_BY_ZERO 5 544e98e3e1Schristos #define LM32_EID_INTERRUPT 6 554e98e3e1Schristos #define LM32_EID_SYSTEM_CALL 7 564e98e3e1Schristos 574e98e3e1Schristos #endif /* LM32_SIM_H */ 58