14559860eSchristos #ifndef S12Z_H 24559860eSchristos #define S12Z_H 34559860eSchristos 44559860eSchristos /* This byte is used to prefix instructions in "page 2" of the opcode 5*8dffb485Schristos space. */ 64559860eSchristos #define PAGE2_PREBYTE (0x1b) 74559860eSchristos 84559860eSchristos struct reg 94559860eSchristos { 10*8dffb485Schristos char *name; /* The canonical name of the register. */ 11*8dffb485Schristos int bytes; /* its size, in bytes. */ 124559860eSchristos }; 134559860eSchristos 144559860eSchristos 154559860eSchristos /* How many registers do we have. Actually there are only 13, 164559860eSchristos because CCL and CCH are the low and high bytes of CCW. But 174559860eSchristos for assemnbly / disassembly purposes they are considered 184559860eSchristos distinct registers. */ 194559860eSchristos #define S12Z_N_REGISTERS 15 204559860eSchristos 214559860eSchristos extern const struct reg registers[S12Z_N_REGISTERS]; 224559860eSchristos 23*8dffb485Schristos /* Solaris defines REG_Y in sys/regset.h; undef it here to avoid 24*8dffb485Schristos breaking compilation when this target is enabled. */ 25*8dffb485Schristos #undef REG_Y 26*8dffb485Schristos 27*8dffb485Schristos enum 28*8dffb485Schristos { 294559860eSchristos REG_D2 = 0, 304559860eSchristos REG_D3, 314559860eSchristos REG_D4, 324559860eSchristos REG_D5, 334559860eSchristos REG_D0, 344559860eSchristos REG_D1, 354559860eSchristos REG_D6, 364559860eSchristos REG_D7, 374559860eSchristos REG_X, 384559860eSchristos REG_Y, 394559860eSchristos REG_S, 404559860eSchristos REG_P, 414559860eSchristos REG_CCH, 424559860eSchristos REG_CCL, 434559860eSchristos REG_CCW 444559860eSchristos }; 454559860eSchristos 46*8dffb485Schristos /* Any of the registers d0, d1, ... d7. */ 474559860eSchristos #define REG_BIT_Dn \ 484559860eSchristos ((0x1U << REG_D2) | \ 494559860eSchristos (0x1U << REG_D3) | \ 504559860eSchristos (0x1U << REG_D4) | \ 514559860eSchristos (0x1U << REG_D5) | \ 524559860eSchristos (0x1U << REG_D6) | \ 534559860eSchristos (0x1U << REG_D7) | \ 544559860eSchristos (0x1U << REG_D0) | \ 554559860eSchristos (0x1U << REG_D1)) 564559860eSchristos 57*8dffb485Schristos /* Any of the registers x, y or z. */ 584559860eSchristos #define REG_BIT_XYS \ 594559860eSchristos ((0x1U << REG_X) | \ 604559860eSchristos (0x1U << REG_Y) | \ 614559860eSchristos (0x1U << REG_S)) 624559860eSchristos 63*8dffb485Schristos /* Any of the registers x, y, z or p. */ 644559860eSchristos #define REG_BIT_XYSP \ 654559860eSchristos ((0x1U << REG_X) | \ 664559860eSchristos (0x1U << REG_Y) | \ 674559860eSchristos (0x1U << REG_S) | \ 684559860eSchristos (0x1U << REG_P)) 694559860eSchristos 70*8dffb485Schristos /* The x register or the y register. */ 714559860eSchristos #define REG_BIT_XY \ 724559860eSchristos ((0x1U << REG_X) | \ 734559860eSchristos (0x1U << REG_Y)) 744559860eSchristos 754559860eSchristos #endif 76