18dffb485Schristos /* Common code for x86 XSAVE extended state. 28dffb485Schristos 3*5ba1f45fSchristos Copyright (C) 2010-2024 Free Software Foundation, Inc. 48dffb485Schristos 58dffb485Schristos This file is part of GDB. 68dffb485Schristos 78dffb485Schristos This program is free software; you can redistribute it and/or modify 88dffb485Schristos it under the terms of the GNU General Public License as published by 98dffb485Schristos the Free Software Foundation; either version 3 of the License, or 108dffb485Schristos (at your option) any later version. 118dffb485Schristos 128dffb485Schristos This program is distributed in the hope that it will be useful, 138dffb485Schristos but WITHOUT ANY WARRANTY; without even the implied warranty of 148dffb485Schristos MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 158dffb485Schristos GNU General Public License for more details. 168dffb485Schristos 178dffb485Schristos You should have received a copy of the GNU General Public License 188dffb485Schristos along with this program. If not, see <http://www.gnu.org/licenses/>. */ 198dffb485Schristos 208dffb485Schristos #ifndef COMMON_X86_XSTATE_H 218dffb485Schristos #define COMMON_X86_XSTATE_H 228dffb485Schristos 23*5ba1f45fSchristos /* The extended state feature IDs in the state component bitmap. */ 24*5ba1f45fSchristos #define X86_XSTATE_X87_ID 0 25*5ba1f45fSchristos #define X86_XSTATE_SSE_ID 1 26*5ba1f45fSchristos #define X86_XSTATE_AVX_ID 2 27*5ba1f45fSchristos #define X86_XSTATE_BNDREGS_ID 3 28*5ba1f45fSchristos #define X86_XSTATE_BNDCFG_ID 4 29*5ba1f45fSchristos #define X86_XSTATE_K_ID 5 30*5ba1f45fSchristos #define X86_XSTATE_ZMM_H_ID 6 31*5ba1f45fSchristos #define X86_XSTATE_ZMM_ID 7 32*5ba1f45fSchristos #define X86_XSTATE_PKRU_ID 9 33*5ba1f45fSchristos 348dffb485Schristos /* The extended state feature bits. */ 35*5ba1f45fSchristos #define X86_XSTATE_X87 (1ULL << X86_XSTATE_X87_ID) 36*5ba1f45fSchristos #define X86_XSTATE_SSE (1ULL << X86_XSTATE_SSE_ID) 37*5ba1f45fSchristos #define X86_XSTATE_AVX (1ULL << X86_XSTATE_AVX_ID) 38*5ba1f45fSchristos #define X86_XSTATE_BNDREGS (1ULL << X86_XSTATE_BNDREGS_ID) 39*5ba1f45fSchristos #define X86_XSTATE_BNDCFG (1ULL << X86_XSTATE_BNDCFG_ID) 408dffb485Schristos #define X86_XSTATE_MPX (X86_XSTATE_BNDREGS | X86_XSTATE_BNDCFG) 418dffb485Schristos 428dffb485Schristos /* AVX 512 adds three feature bits. All three must be enabled. */ 43*5ba1f45fSchristos #define X86_XSTATE_K (1ULL << X86_XSTATE_K_ID) 44*5ba1f45fSchristos #define X86_XSTATE_ZMM_H (1ULL << X86_XSTATE_ZMM_H_ID) 45*5ba1f45fSchristos #define X86_XSTATE_ZMM (1ULL << X86_XSTATE_ZMM_ID) 468dffb485Schristos #define X86_XSTATE_AVX512 (X86_XSTATE_K | X86_XSTATE_ZMM_H \ 478dffb485Schristos | X86_XSTATE_ZMM) 488dffb485Schristos 49*5ba1f45fSchristos #define X86_XSTATE_PKRU (1ULL << X86_XSTATE_PKRU_ID) 50*5ba1f45fSchristos 51*5ba1f45fSchristos /* Total size of the XSAVE area extended region and offsets of 52*5ba1f45fSchristos register states within the region. Offsets are set to 0 to 53*5ba1f45fSchristos indicate the absence of the associated registers. */ 54*5ba1f45fSchristos 55*5ba1f45fSchristos struct x86_xsave_layout 56*5ba1f45fSchristos { 57*5ba1f45fSchristos int sizeof_xsave = 0; 58*5ba1f45fSchristos int avx_offset = 0; 59*5ba1f45fSchristos int bndregs_offset = 0; 60*5ba1f45fSchristos int bndcfg_offset = 0; 61*5ba1f45fSchristos int k_offset = 0; 62*5ba1f45fSchristos int zmm_h_offset = 0; 63*5ba1f45fSchristos int zmm_offset = 0; 64*5ba1f45fSchristos int pkru_offset = 0; 65*5ba1f45fSchristos }; 66*5ba1f45fSchristos 67*5ba1f45fSchristos constexpr bool operator== (const x86_xsave_layout &lhs, 68*5ba1f45fSchristos const x86_xsave_layout &rhs) 69*5ba1f45fSchristos { 70*5ba1f45fSchristos return lhs.sizeof_xsave == rhs.sizeof_xsave 71*5ba1f45fSchristos && lhs.avx_offset == rhs.avx_offset 72*5ba1f45fSchristos && lhs.bndregs_offset == rhs.bndregs_offset 73*5ba1f45fSchristos && lhs.bndcfg_offset == rhs.bndcfg_offset 74*5ba1f45fSchristos && lhs.k_offset == rhs.k_offset 75*5ba1f45fSchristos && lhs.zmm_h_offset == rhs.zmm_h_offset 76*5ba1f45fSchristos && lhs.zmm_offset == rhs.zmm_offset 77*5ba1f45fSchristos && lhs.pkru_offset == rhs.pkru_offset; 78*5ba1f45fSchristos } 79*5ba1f45fSchristos 80*5ba1f45fSchristos constexpr bool operator!= (const x86_xsave_layout &lhs, 81*5ba1f45fSchristos const x86_xsave_layout &rhs) 82*5ba1f45fSchristos { 83*5ba1f45fSchristos return !(lhs == rhs); 84*5ba1f45fSchristos } 85*5ba1f45fSchristos 868dffb485Schristos 878dffb485Schristos /* Supported mask and size of the extended state. */ 888dffb485Schristos #define X86_XSTATE_X87_MASK X86_XSTATE_X87 898dffb485Schristos #define X86_XSTATE_SSE_MASK (X86_XSTATE_X87 | X86_XSTATE_SSE) 908dffb485Schristos #define X86_XSTATE_AVX_MASK (X86_XSTATE_SSE_MASK | X86_XSTATE_AVX) 918dffb485Schristos #define X86_XSTATE_MPX_MASK (X86_XSTATE_SSE_MASK | X86_XSTATE_MPX) 928dffb485Schristos #define X86_XSTATE_AVX_MPX_MASK (X86_XSTATE_AVX_MASK | X86_XSTATE_MPX) 938dffb485Schristos #define X86_XSTATE_AVX_AVX512_MASK (X86_XSTATE_AVX_MASK | X86_XSTATE_AVX512) 948dffb485Schristos #define X86_XSTATE_AVX_MPX_AVX512_PKU_MASK (X86_XSTATE_AVX_MPX_MASK\ 958dffb485Schristos | X86_XSTATE_AVX512 | X86_XSTATE_PKRU) 968dffb485Schristos 978dffb485Schristos #define X86_XSTATE_ALL_MASK (X86_XSTATE_AVX_MPX_AVX512_PKU_MASK) 988dffb485Schristos 998dffb485Schristos 1008dffb485Schristos #define X86_XSTATE_SSE_SIZE 576 1018dffb485Schristos #define X86_XSTATE_AVX_SIZE 832 1028dffb485Schristos 1038dffb485Schristos 1048dffb485Schristos /* In case one of the MPX XCR0 bits is set we consider we have MPX. */ 1058dffb485Schristos #define HAS_MPX(XCR0) (((XCR0) & X86_XSTATE_MPX) != 0) 1068dffb485Schristos #define HAS_AVX(XCR0) (((XCR0) & X86_XSTATE_AVX) != 0) 1078dffb485Schristos #define HAS_AVX512(XCR0) (((XCR0) & X86_XSTATE_AVX512) != 0) 1088dffb485Schristos #define HAS_PKRU(XCR0) (((XCR0) & X86_XSTATE_PKRU) != 0) 1098dffb485Schristos 1108dffb485Schristos /* Initial value for fctrl register, as defined in the X86 manual, and 1118dffb485Schristos confirmed in the (Linux) kernel source. When the x87 floating point 1128dffb485Schristos feature is not enabled in an inferior we use this as the value of the 1138dffb485Schristos fcrtl register. */ 1148dffb485Schristos 1158dffb485Schristos #define I387_FCTRL_INIT_VAL 0x037f 1168dffb485Schristos 1178dffb485Schristos /* Initial value for mxcsr register. When the avx and sse floating point 1188dffb485Schristos features are not enabled in an inferior we use this as the value of the 1198dffb485Schristos mxcsr register. */ 1208dffb485Schristos 1218dffb485Schristos #define I387_MXCSR_INIT_VAL 0x1f80 1228dffb485Schristos 1238dffb485Schristos #endif /* COMMON_X86_XSTATE_H */ 124