1a5a4af3bSchristos /* Contributed by Jon Beniston <jon@beniston.com> 2a5a4af3bSchristos 3*8b657b07Schristos Copyright (C) 2009-2023 Free Software Foundation, Inc. 4a5a4af3bSchristos 5a5a4af3bSchristos This file is part of GDB. 6a5a4af3bSchristos 7a5a4af3bSchristos This program is free software; you can redistribute it and/or modify 8a5a4af3bSchristos it under the terms of the GNU General Public License as published by 9a5a4af3bSchristos the Free Software Foundation; either version 3 of the License, or 10a5a4af3bSchristos (at your option) any later version. 11a5a4af3bSchristos 12a5a4af3bSchristos This program is distributed in the hope that it will be useful, 13a5a4af3bSchristos but WITHOUT ANY WARRANTY; without even the implied warranty of 14a5a4af3bSchristos MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15a5a4af3bSchristos GNU General Public License for more details. 16a5a4af3bSchristos 17a5a4af3bSchristos You should have received a copy of the GNU General Public License 18a5a4af3bSchristos along with this program. If not, see <http://www.gnu.org/licenses/>. */ 19a5a4af3bSchristos 20a5a4af3bSchristos #ifndef LM32_SIM_H 21a5a4af3bSchristos #define LM32_SIM_H 22a5a4af3bSchristos 23a5a4af3bSchristos #include "gdb/sim-lm32.h" 24a5a4af3bSchristos 25a5a4af3bSchristos /* CSRs. */ 26a5a4af3bSchristos #define LM32_CSR_IE 0 27a5a4af3bSchristos #define LM32_CSR_IM 1 28a5a4af3bSchristos #define LM32_CSR_IP 2 29a5a4af3bSchristos #define LM32_CSR_ICC 3 30a5a4af3bSchristos #define LM32_CSR_DCC 4 31a5a4af3bSchristos #define LM32_CSR_CC 5 32a5a4af3bSchristos #define LM32_CSR_CFG 6 33a5a4af3bSchristos #define LM32_CSR_EBA 7 34a5a4af3bSchristos #define LM32_CSR_DC 8 35a5a4af3bSchristos #define LM32_CSR_DEBA 9 36a5a4af3bSchristos #define LM32_CSR_JTX 0xe 37a5a4af3bSchristos #define LM32_CSR_JRX 0xf 38a5a4af3bSchristos #define LM32_CSR_BP0 0x10 39a5a4af3bSchristos #define LM32_CSR_BP1 0x11 40a5a4af3bSchristos #define LM32_CSR_BP2 0x12 41a5a4af3bSchristos #define LM32_CSR_BP3 0x13 42a5a4af3bSchristos #define LM32_CSR_WP0 0x18 43a5a4af3bSchristos #define LM32_CSR_WP1 0x19 44a5a4af3bSchristos #define LM32_CSR_WP2 0x1a 45a5a4af3bSchristos #define LM32_CSR_WP3 0x1b 46a5a4af3bSchristos 47a5a4af3bSchristos /* Exception IDs. */ 48a5a4af3bSchristos #define LM32_EID_RESET 0 49a5a4af3bSchristos #define LM32_EID_BREAKPOINT 1 50a5a4af3bSchristos #define LM32_EID_INSTRUCTION_BUS_ERROR 2 51a5a4af3bSchristos #define LM32_EID_WATCHPOINT 3 52a5a4af3bSchristos #define LM32_EID_DATA_BUS_ERROR 4 53a5a4af3bSchristos #define LM32_EID_DIVIDE_BY_ZERO 5 54a5a4af3bSchristos #define LM32_EID_INTERRUPT 6 55a5a4af3bSchristos #define LM32_EID_SYSTEM_CALL 7 56a5a4af3bSchristos 57a5a4af3bSchristos #endif /* LM32_SIM_H */ 58