1a5a4af3bSchristos /* Decode header for lm32bf. 2a5a4af3bSchristos 3a5a4af3bSchristos THIS FILE IS MACHINE GENERATED WITH CGEN. 4a5a4af3bSchristos 5*8b657b07Schristos Copyright 1996-2023 Free Software Foundation, Inc. 6a5a4af3bSchristos 7a5a4af3bSchristos This file is part of the GNU simulators. 8a5a4af3bSchristos 9a5a4af3bSchristos This file is free software; you can redistribute it and/or modify 10a5a4af3bSchristos it under the terms of the GNU General Public License as published by 11a5a4af3bSchristos the Free Software Foundation; either version 3, or (at your option) 12a5a4af3bSchristos any later version. 13a5a4af3bSchristos 14a5a4af3bSchristos It is distributed in the hope that it will be useful, but WITHOUT 15a5a4af3bSchristos ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 16a5a4af3bSchristos or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 17a5a4af3bSchristos License for more details. 18a5a4af3bSchristos 19a5a4af3bSchristos You should have received a copy of the GNU General Public License along 20a5a4af3bSchristos with this program; if not, see <http://www.gnu.org/licenses/>. 21a5a4af3bSchristos 22a5a4af3bSchristos */ 23a5a4af3bSchristos 24a5a4af3bSchristos #ifndef LM32BF_DECODE_H 25a5a4af3bSchristos #define LM32BF_DECODE_H 26a5a4af3bSchristos 27a5a4af3bSchristos extern const IDESC *lm32bf_decode (SIM_CPU *, IADDR, 28a5a4af3bSchristos CGEN_INSN_WORD, CGEN_INSN_WORD, 29a5a4af3bSchristos ARGBUF *); 30a5a4af3bSchristos extern void lm32bf_init_idesc_table (SIM_CPU *); 31a5a4af3bSchristos extern void lm32bf_sem_init_idesc_table (SIM_CPU *); 32a5a4af3bSchristos extern void lm32bf_semf_init_idesc_table (SIM_CPU *); 33a5a4af3bSchristos 34a5a4af3bSchristos /* Enum declaration for instructions in cpu family lm32bf. */ 35a5a4af3bSchristos typedef enum lm32bf_insn_type { 36a5a4af3bSchristos LM32BF_INSN_X_INVALID, LM32BF_INSN_X_AFTER, LM32BF_INSN_X_BEFORE, LM32BF_INSN_X_CTI_CHAIN 37a5a4af3bSchristos , LM32BF_INSN_X_CHAIN, LM32BF_INSN_X_BEGIN, LM32BF_INSN_ADD, LM32BF_INSN_ADDI 38a5a4af3bSchristos , LM32BF_INSN_AND, LM32BF_INSN_ANDI, LM32BF_INSN_ANDHII, LM32BF_INSN_B 39a5a4af3bSchristos , LM32BF_INSN_BI, LM32BF_INSN_BE, LM32BF_INSN_BG, LM32BF_INSN_BGE 40a5a4af3bSchristos , LM32BF_INSN_BGEU, LM32BF_INSN_BGU, LM32BF_INSN_BNE, LM32BF_INSN_CALL 41a5a4af3bSchristos , LM32BF_INSN_CALLI, LM32BF_INSN_CMPE, LM32BF_INSN_CMPEI, LM32BF_INSN_CMPG 42a5a4af3bSchristos , LM32BF_INSN_CMPGI, LM32BF_INSN_CMPGE, LM32BF_INSN_CMPGEI, LM32BF_INSN_CMPGEU 43a5a4af3bSchristos , LM32BF_INSN_CMPGEUI, LM32BF_INSN_CMPGU, LM32BF_INSN_CMPGUI, LM32BF_INSN_CMPNE 44a5a4af3bSchristos , LM32BF_INSN_CMPNEI, LM32BF_INSN_DIVU, LM32BF_INSN_LB, LM32BF_INSN_LBU 45a5a4af3bSchristos , LM32BF_INSN_LH, LM32BF_INSN_LHU, LM32BF_INSN_LW, LM32BF_INSN_MODU 46a5a4af3bSchristos , LM32BF_INSN_MUL, LM32BF_INSN_MULI, LM32BF_INSN_NOR, LM32BF_INSN_NORI 47a5a4af3bSchristos , LM32BF_INSN_OR, LM32BF_INSN_ORI, LM32BF_INSN_ORHII, LM32BF_INSN_RCSR 48a5a4af3bSchristos , LM32BF_INSN_SB, LM32BF_INSN_SEXTB, LM32BF_INSN_SEXTH, LM32BF_INSN_SH 49a5a4af3bSchristos , LM32BF_INSN_SL, LM32BF_INSN_SLI, LM32BF_INSN_SR, LM32BF_INSN_SRI 50a5a4af3bSchristos , LM32BF_INSN_SRU, LM32BF_INSN_SRUI, LM32BF_INSN_SUB, LM32BF_INSN_SW 51a5a4af3bSchristos , LM32BF_INSN_USER, LM32BF_INSN_WCSR, LM32BF_INSN_XOR, LM32BF_INSN_XORI 52a5a4af3bSchristos , LM32BF_INSN_XNOR, LM32BF_INSN_XNORI, LM32BF_INSN_BREAK, LM32BF_INSN_SCALL 53a5a4af3bSchristos , LM32BF_INSN__MAX 54a5a4af3bSchristos } LM32BF_INSN_TYPE; 55a5a4af3bSchristos 56a5a4af3bSchristos /* Enum declaration for semantic formats in cpu family lm32bf. */ 57a5a4af3bSchristos typedef enum lm32bf_sfmt_type { 58a5a4af3bSchristos LM32BF_SFMT_EMPTY, LM32BF_SFMT_ADD, LM32BF_SFMT_ADDI, LM32BF_SFMT_ANDI 59a5a4af3bSchristos , LM32BF_SFMT_ANDHII, LM32BF_SFMT_B, LM32BF_SFMT_BI, LM32BF_SFMT_BE 60a5a4af3bSchristos , LM32BF_SFMT_CALL, LM32BF_SFMT_CALLI, LM32BF_SFMT_DIVU, LM32BF_SFMT_LB 61a5a4af3bSchristos , LM32BF_SFMT_LH, LM32BF_SFMT_LW, LM32BF_SFMT_ORI, LM32BF_SFMT_RCSR 62a5a4af3bSchristos , LM32BF_SFMT_SB, LM32BF_SFMT_SEXTB, LM32BF_SFMT_SH, LM32BF_SFMT_SW 63a5a4af3bSchristos , LM32BF_SFMT_USER, LM32BF_SFMT_WCSR, LM32BF_SFMT_BREAK 64a5a4af3bSchristos } LM32BF_SFMT_TYPE; 65a5a4af3bSchristos 66a5a4af3bSchristos /* Function unit handlers (user written). */ 67a5a4af3bSchristos 68a5a4af3bSchristos extern int lm32bf_model_lm32_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/); 69a5a4af3bSchristos 70a5a4af3bSchristos /* Profiling before/after handlers (user written) */ 71a5a4af3bSchristos 72a5a4af3bSchristos extern void lm32bf_model_insn_before (SIM_CPU *, int /*first_p*/); 73a5a4af3bSchristos extern void lm32bf_model_insn_after (SIM_CPU *, int /*last_p*/, int /*cycles*/); 74a5a4af3bSchristos 75a5a4af3bSchristos #endif /* LM32BF_DECODE_H */ 76