17f2ac410Schristos #ifndef S12Z_H 27f2ac410Schristos #define S12Z_H 37f2ac410Schristos 47f2ac410Schristos /* This byte is used to prefix instructions in "page 2" of the opcode 5*7d62b00eSchristos space. */ 67f2ac410Schristos #define PAGE2_PREBYTE (0x1b) 77f2ac410Schristos 87f2ac410Schristos struct reg 97f2ac410Schristos { 10*7d62b00eSchristos char *name; /* The canonical name of the register. */ 11*7d62b00eSchristos int bytes; /* its size, in bytes. */ 127f2ac410Schristos }; 137f2ac410Schristos 147f2ac410Schristos 157f2ac410Schristos /* How many registers do we have. Actually there are only 13, 167f2ac410Schristos because CCL and CCH are the low and high bytes of CCW. But 177f2ac410Schristos for assemnbly / disassembly purposes they are considered 187f2ac410Schristos distinct registers. */ 197f2ac410Schristos #define S12Z_N_REGISTERS 15 207f2ac410Schristos 217f2ac410Schristos extern const struct reg registers[S12Z_N_REGISTERS]; 227f2ac410Schristos 23*7d62b00eSchristos /* Solaris defines REG_Y in sys/regset.h; undef it here to avoid 24*7d62b00eSchristos breaking compilation when this target is enabled. */ 25*7d62b00eSchristos #undef REG_Y 26*7d62b00eSchristos 27*7d62b00eSchristos enum 28*7d62b00eSchristos { 297f2ac410Schristos REG_D2 = 0, 307f2ac410Schristos REG_D3, 317f2ac410Schristos REG_D4, 327f2ac410Schristos REG_D5, 337f2ac410Schristos REG_D0, 347f2ac410Schristos REG_D1, 357f2ac410Schristos REG_D6, 367f2ac410Schristos REG_D7, 377f2ac410Schristos REG_X, 387f2ac410Schristos REG_Y, 397f2ac410Schristos REG_S, 407f2ac410Schristos REG_P, 417f2ac410Schristos REG_CCH, 427f2ac410Schristos REG_CCL, 437f2ac410Schristos REG_CCW 447f2ac410Schristos }; 457f2ac410Schristos 46*7d62b00eSchristos /* Any of the registers d0, d1, ... d7. */ 477f2ac410Schristos #define REG_BIT_Dn \ 487f2ac410Schristos ((0x1U << REG_D2) | \ 497f2ac410Schristos (0x1U << REG_D3) | \ 507f2ac410Schristos (0x1U << REG_D4) | \ 517f2ac410Schristos (0x1U << REG_D5) | \ 527f2ac410Schristos (0x1U << REG_D6) | \ 537f2ac410Schristos (0x1U << REG_D7) | \ 547f2ac410Schristos (0x1U << REG_D0) | \ 557f2ac410Schristos (0x1U << REG_D1)) 567f2ac410Schristos 57*7d62b00eSchristos /* Any of the registers x, y or z. */ 587f2ac410Schristos #define REG_BIT_XYS \ 597f2ac410Schristos ((0x1U << REG_X) | \ 607f2ac410Schristos (0x1U << REG_Y) | \ 617f2ac410Schristos (0x1U << REG_S)) 627f2ac410Schristos 63*7d62b00eSchristos /* Any of the registers x, y, z or p. */ 647f2ac410Schristos #define REG_BIT_XYSP \ 657f2ac410Schristos ((0x1U << REG_X) | \ 667f2ac410Schristos (0x1U << REG_Y) | \ 677f2ac410Schristos (0x1U << REG_S) | \ 687f2ac410Schristos (0x1U << REG_P)) 697f2ac410Schristos 70*7d62b00eSchristos /* The x register or the y register. */ 717f2ac410Schristos #define REG_BIT_XY \ 727f2ac410Schristos ((0x1U << REG_X) | \ 737f2ac410Schristos (0x1U << REG_Y)) 747f2ac410Schristos 757f2ac410Schristos #endif 76