11debfc3dSmrg /* Xtensa configuration settings. 2*8feb0f0bSmrg Copyright (C) 2001-2020 Free Software Foundation, Inc. 31debfc3dSmrg Contributed by Bob Wilson (bob.wilson@acm.org) at Tensilica. 41debfc3dSmrg 51debfc3dSmrg This program is free software; you can redistribute it and/or modify 61debfc3dSmrg it under the terms of the GNU General Public License as published by 71debfc3dSmrg the Free Software Foundation; either version 2, or (at your option) 81debfc3dSmrg any later version. 91debfc3dSmrg 101debfc3dSmrg This program is distributed in the hope that it will be useful, but 111debfc3dSmrg WITHOUT ANY WARRANTY; without even the implied warranty of 121debfc3dSmrg MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 131debfc3dSmrg General Public License for more details. 141debfc3dSmrg 151debfc3dSmrg You should have received a copy of the GNU General Public License 161debfc3dSmrg along with this program; if not, write to the Free Software 171debfc3dSmrg Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 181debfc3dSmrg 191debfc3dSmrg #ifndef XTENSA_CONFIG_H 201debfc3dSmrg #define XTENSA_CONFIG_H 211debfc3dSmrg 221debfc3dSmrg /* The macros defined here match those with the same names in the Xtensa 231debfc3dSmrg compile-time HAL (Hardware Abstraction Layer). Please refer to the 241debfc3dSmrg Xtensa System Software Reference Manual for documentation of these 251debfc3dSmrg macros. */ 261debfc3dSmrg 271debfc3dSmrg #undef XCHAL_HAVE_BE 281debfc3dSmrg #define XCHAL_HAVE_BE 1 291debfc3dSmrg 301debfc3dSmrg #undef XCHAL_HAVE_DENSITY 311debfc3dSmrg #define XCHAL_HAVE_DENSITY 1 321debfc3dSmrg 331debfc3dSmrg #undef XCHAL_HAVE_CONST16 341debfc3dSmrg #define XCHAL_HAVE_CONST16 0 351debfc3dSmrg 361debfc3dSmrg #undef XCHAL_HAVE_ABS 371debfc3dSmrg #define XCHAL_HAVE_ABS 1 381debfc3dSmrg 391debfc3dSmrg #undef XCHAL_HAVE_ADDX 401debfc3dSmrg #define XCHAL_HAVE_ADDX 1 411debfc3dSmrg 421debfc3dSmrg #undef XCHAL_HAVE_L32R 431debfc3dSmrg #define XCHAL_HAVE_L32R 1 441debfc3dSmrg 451debfc3dSmrg #undef XSHAL_USE_ABSOLUTE_LITERALS 461debfc3dSmrg #define XSHAL_USE_ABSOLUTE_LITERALS 0 471debfc3dSmrg 481debfc3dSmrg #undef XSHAL_HAVE_TEXT_SECTION_LITERALS 491debfc3dSmrg #define XSHAL_HAVE_TEXT_SECTION_LITERALS 1 /* Set if there is some memory that allows both code and literals. */ 501debfc3dSmrg 511debfc3dSmrg #undef XCHAL_HAVE_MAC16 521debfc3dSmrg #define XCHAL_HAVE_MAC16 0 531debfc3dSmrg 541debfc3dSmrg #undef XCHAL_HAVE_MUL16 551debfc3dSmrg #define XCHAL_HAVE_MUL16 1 561debfc3dSmrg 571debfc3dSmrg #undef XCHAL_HAVE_MUL32 581debfc3dSmrg #define XCHAL_HAVE_MUL32 1 591debfc3dSmrg 601debfc3dSmrg #undef XCHAL_HAVE_MUL32_HIGH 611debfc3dSmrg #define XCHAL_HAVE_MUL32_HIGH 0 621debfc3dSmrg 631debfc3dSmrg #undef XCHAL_HAVE_DIV32 641debfc3dSmrg #define XCHAL_HAVE_DIV32 1 651debfc3dSmrg 661debfc3dSmrg #undef XCHAL_HAVE_NSA 671debfc3dSmrg #define XCHAL_HAVE_NSA 1 681debfc3dSmrg 691debfc3dSmrg #undef XCHAL_HAVE_MINMAX 701debfc3dSmrg #define XCHAL_HAVE_MINMAX 1 711debfc3dSmrg 721debfc3dSmrg #undef XCHAL_HAVE_SEXT 731debfc3dSmrg #define XCHAL_HAVE_SEXT 1 741debfc3dSmrg 751debfc3dSmrg #undef XCHAL_HAVE_LOOPS 761debfc3dSmrg #define XCHAL_HAVE_LOOPS 1 771debfc3dSmrg 781debfc3dSmrg #undef XCHAL_HAVE_THREADPTR 791debfc3dSmrg #define XCHAL_HAVE_THREADPTR 1 801debfc3dSmrg 811debfc3dSmrg #undef XCHAL_HAVE_RELEASE_SYNC 821debfc3dSmrg #define XCHAL_HAVE_RELEASE_SYNC 1 831debfc3dSmrg 841debfc3dSmrg #undef XCHAL_HAVE_S32C1I 851debfc3dSmrg #define XCHAL_HAVE_S32C1I 1 861debfc3dSmrg 871debfc3dSmrg #undef XCHAL_HAVE_BOOLEANS 881debfc3dSmrg #define XCHAL_HAVE_BOOLEANS 0 891debfc3dSmrg 901debfc3dSmrg #undef XCHAL_HAVE_FP 911debfc3dSmrg #define XCHAL_HAVE_FP 0 921debfc3dSmrg 931debfc3dSmrg #undef XCHAL_HAVE_FP_DIV 941debfc3dSmrg #define XCHAL_HAVE_FP_DIV 0 951debfc3dSmrg 961debfc3dSmrg #undef XCHAL_HAVE_FP_RECIP 971debfc3dSmrg #define XCHAL_HAVE_FP_RECIP 0 981debfc3dSmrg 991debfc3dSmrg #undef XCHAL_HAVE_FP_SQRT 1001debfc3dSmrg #define XCHAL_HAVE_FP_SQRT 0 1011debfc3dSmrg 1021debfc3dSmrg #undef XCHAL_HAVE_FP_RSQRT 1031debfc3dSmrg #define XCHAL_HAVE_FP_RSQRT 0 1041debfc3dSmrg 1051debfc3dSmrg #undef XCHAL_HAVE_DFP_accel 1061debfc3dSmrg #define XCHAL_HAVE_DFP_accel 0 1071debfc3dSmrg #undef XCHAL_HAVE_WINDOWED 1081debfc3dSmrg #define XCHAL_HAVE_WINDOWED 1 1091debfc3dSmrg 1101debfc3dSmrg #undef XCHAL_NUM_AREGS 1111debfc3dSmrg #define XCHAL_NUM_AREGS 32 1121debfc3dSmrg 1131debfc3dSmrg #undef XCHAL_HAVE_WIDE_BRANCHES 1141debfc3dSmrg #define XCHAL_HAVE_WIDE_BRANCHES 0 1151debfc3dSmrg 1161debfc3dSmrg #undef XCHAL_HAVE_PREDICTED_BRANCHES 1171debfc3dSmrg #define XCHAL_HAVE_PREDICTED_BRANCHES 0 1181debfc3dSmrg 1191debfc3dSmrg 1201debfc3dSmrg #undef XCHAL_ICACHE_SIZE 1211debfc3dSmrg #define XCHAL_ICACHE_SIZE 16384 1221debfc3dSmrg 1231debfc3dSmrg #undef XCHAL_DCACHE_SIZE 1241debfc3dSmrg #define XCHAL_DCACHE_SIZE 16384 1251debfc3dSmrg 1261debfc3dSmrg #undef XCHAL_ICACHE_LINESIZE 1271debfc3dSmrg #define XCHAL_ICACHE_LINESIZE 32 1281debfc3dSmrg 1291debfc3dSmrg #undef XCHAL_DCACHE_LINESIZE 1301debfc3dSmrg #define XCHAL_DCACHE_LINESIZE 32 1311debfc3dSmrg 1321debfc3dSmrg #undef XCHAL_ICACHE_LINEWIDTH 1331debfc3dSmrg #define XCHAL_ICACHE_LINEWIDTH 5 1341debfc3dSmrg 1351debfc3dSmrg #undef XCHAL_DCACHE_LINEWIDTH 1361debfc3dSmrg #define XCHAL_DCACHE_LINEWIDTH 5 1371debfc3dSmrg 1381debfc3dSmrg #undef XCHAL_DCACHE_IS_WRITEBACK 1391debfc3dSmrg #define XCHAL_DCACHE_IS_WRITEBACK 1 1401debfc3dSmrg 1411debfc3dSmrg 1421debfc3dSmrg #undef XCHAL_HAVE_MMU 1431debfc3dSmrg #define XCHAL_HAVE_MMU 1 1441debfc3dSmrg 1451debfc3dSmrg #undef XCHAL_MMU_MIN_PTE_PAGE_SIZE 1461debfc3dSmrg #define XCHAL_MMU_MIN_PTE_PAGE_SIZE 12 1471debfc3dSmrg 1481debfc3dSmrg 1491debfc3dSmrg #undef XCHAL_HAVE_DEBUG 1501debfc3dSmrg #define XCHAL_HAVE_DEBUG 1 1511debfc3dSmrg 1521debfc3dSmrg #undef XCHAL_NUM_IBREAK 1531debfc3dSmrg #define XCHAL_NUM_IBREAK 2 1541debfc3dSmrg 1551debfc3dSmrg #undef XCHAL_NUM_DBREAK 1561debfc3dSmrg #define XCHAL_NUM_DBREAK 2 1571debfc3dSmrg 1581debfc3dSmrg #undef XCHAL_DEBUGLEVEL 1591debfc3dSmrg #define XCHAL_DEBUGLEVEL 6 1601debfc3dSmrg 1611debfc3dSmrg 1621debfc3dSmrg #undef XCHAL_MAX_INSTRUCTION_SIZE 1631debfc3dSmrg #define XCHAL_MAX_INSTRUCTION_SIZE 3 1641debfc3dSmrg 1651debfc3dSmrg #undef XCHAL_INST_FETCH_WIDTH 1661debfc3dSmrg #define XCHAL_INST_FETCH_WIDTH 4 1671debfc3dSmrg 1681debfc3dSmrg 1691debfc3dSmrg #undef XSHAL_ABI 1701debfc3dSmrg #undef XTHAL_ABI_WINDOWED 1711debfc3dSmrg #undef XTHAL_ABI_CALL0 1721debfc3dSmrg #define XSHAL_ABI XTHAL_ABI_WINDOWED 1731debfc3dSmrg #define XTHAL_ABI_WINDOWED 0 1741debfc3dSmrg #define XTHAL_ABI_CALL0 1 1751debfc3dSmrg 1761debfc3dSmrg #endif /* !XTENSA_CONFIG_H */ 177