136ac495dSmrg;; Machine Descriptions for R8C/M16C/M32C 2*8feb0f0bSmrg;; Copyright (C) 2005-2020 Free Software Foundation, Inc. 336ac495dSmrg;; Contributed by Red Hat. 436ac495dSmrg;; 536ac495dSmrg;; This file is part of GCC. 636ac495dSmrg;; 736ac495dSmrg;; GCC is free software; you can redistribute it and/or modify it 836ac495dSmrg;; under the terms of the GNU General Public License as published 936ac495dSmrg;; by the Free Software Foundation; either version 3, or (at your 1036ac495dSmrg;; option) any later version. 1136ac495dSmrg;; 1236ac495dSmrg;; GCC is distributed in the hope that it will be useful, but WITHOUT 1336ac495dSmrg;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 1436ac495dSmrg;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 1536ac495dSmrg;; License for more details. 1636ac495dSmrg;; 1736ac495dSmrg;; You should have received a copy of the GNU General Public License 1836ac495dSmrg;; along with GCC; see the file COPYING3. If not see 1936ac495dSmrg;; <http://www.gnu.org/licenses/>. 2036ac495dSmrg 2136ac495dSmrg(define_constants 2236ac495dSmrg [(R0_REGNO 0) 2336ac495dSmrg (R2_REGNO 1) 2436ac495dSmrg (R1_REGNO 2) 2536ac495dSmrg (R3_REGNO 3) 2636ac495dSmrg 2736ac495dSmrg (A0_REGNO 4) 2836ac495dSmrg (A1_REGNO 5) 2936ac495dSmrg (SB_REGNO 6) 3036ac495dSmrg (FB_REGNO 7) 3136ac495dSmrg 3236ac495dSmrg (SP_REGNO 8) 3336ac495dSmrg (PC_REGNO 9) 3436ac495dSmrg (FLG_REGNO 10) 3536ac495dSmrg (MEM0_REGNO 12) 3636ac495dSmrg (MEM7_REGNO 19) 3736ac495dSmrg ]) 3836ac495dSmrg 3936ac495dSmrg(define_constants 4036ac495dSmrg [(UNS_PROLOGUE_END 1) 4136ac495dSmrg (UNS_EPILOGUE_START 2) 4236ac495dSmrg (UNS_EH_EPILOGUE 3) 4336ac495dSmrg (UNS_PUSHM 4) 4436ac495dSmrg (UNS_POPM 5) 4536ac495dSmrg (UNS_SMOVF 6) 4636ac495dSmrg (UNS_SSTR 7) 4736ac495dSmrg (UNS_SCMPU 8) 4836ac495dSmrg (UNS_SMOVU 9) 4936ac495dSmrg (UNS_FSETB 10) 5036ac495dSmrg (UNS_FREIT 11) 5136ac495dSmrg ]) 5236ac495dSmrg 5336ac495dSmrg;; n = no change, x = clobbered. The first 16 values are chosen such 5436ac495dSmrg;; that the enum has one bit set for each flag. 5536ac495dSmrg(define_attr "flags" "x,c,z,zc,s,sc,sz,szc,o,oc,oz,ozc,os,osc,osz,oszc,n" (const_string "n")) 5636ac495dSmrg(define_asm_attributes [(set_attr "flags" "x")]) 5736ac495dSmrg 5836ac495dSmrg(define_mode_iterator QHI [QI HI]) 5936ac495dSmrg(define_mode_iterator HPSI [(HI "TARGET_A16") (PSI "TARGET_A24")]) 6036ac495dSmrg(define_mode_iterator QHPSI [QI HI (PSI "TARGET_A24")]) 6136ac495dSmrg(define_mode_iterator QHSI [QI HI (SI "TARGET_A24")]) 6236ac495dSmrg(define_mode_attr bwl [(QI "b") (HI "w") (PSI "l") (SI "l")]) 6336ac495dSmrg 6436ac495dSmrg(define_code_iterator eqne_cond [eq ne]) 6536ac495dSmrg 6636ac495dSmrg 6736ac495dSmrg(define_insn "nop" 6836ac495dSmrg [(const_int 0)] 6936ac495dSmrg "" 7036ac495dSmrg "nop" 7136ac495dSmrg [(set_attr "flags" "n")] 7236ac495dSmrg) 7336ac495dSmrg 7436ac495dSmrg(define_insn "no_insn" 7536ac495dSmrg [(const_int 1)] 7636ac495dSmrg "" 7736ac495dSmrg "" 7836ac495dSmrg [(set_attr "flags" "n")] 7936ac495dSmrg) 80