1*cb63e24eSchristos /* This file defines the interface between the m32c simulator and gdb. 2*cb63e24eSchristos Copyright (C) 2005-2024 Free Software Foundation, Inc. 3*cb63e24eSchristos 4*cb63e24eSchristos This file is part of GDB. 5*cb63e24eSchristos 6*cb63e24eSchristos This program is free software; you can redistribute it and/or modify 7*cb63e24eSchristos it under the terms of the GNU General Public License as published by 8*cb63e24eSchristos the Free Software Foundation; either version 3 of the License, or 9*cb63e24eSchristos (at your option) any later version. 10*cb63e24eSchristos 11*cb63e24eSchristos This program is distributed in the hope that it will be useful, 12*cb63e24eSchristos but WITHOUT ANY WARRANTY; without even the implied warranty of 13*cb63e24eSchristos MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14*cb63e24eSchristos GNU General Public License for more details. 15*cb63e24eSchristos 16*cb63e24eSchristos You should have received a copy of the GNU General Public License 17*cb63e24eSchristos along with this program. If not, see <http://www.gnu.org/licenses/>. */ 18*cb63e24eSchristos 19*cb63e24eSchristos #ifndef SIM_M32C_H 20*cb63e24eSchristos #define SIM_M32C_H 21*cb63e24eSchristos 22*cb63e24eSchristos enum m32c_sim_reg { 23*cb63e24eSchristos m32c_sim_reg_r0_bank0, 24*cb63e24eSchristos m32c_sim_reg_r1_bank0, 25*cb63e24eSchristos m32c_sim_reg_r2_bank0, 26*cb63e24eSchristos m32c_sim_reg_r3_bank0, 27*cb63e24eSchristos m32c_sim_reg_a0_bank0, 28*cb63e24eSchristos m32c_sim_reg_a1_bank0, 29*cb63e24eSchristos m32c_sim_reg_fb_bank0, 30*cb63e24eSchristos m32c_sim_reg_sb_bank0, 31*cb63e24eSchristos m32c_sim_reg_r0_bank1, 32*cb63e24eSchristos m32c_sim_reg_r1_bank1, 33*cb63e24eSchristos m32c_sim_reg_r2_bank1, 34*cb63e24eSchristos m32c_sim_reg_r3_bank1, 35*cb63e24eSchristos m32c_sim_reg_a0_bank1, 36*cb63e24eSchristos m32c_sim_reg_a1_bank1, 37*cb63e24eSchristos m32c_sim_reg_fb_bank1, 38*cb63e24eSchristos m32c_sim_reg_sb_bank1, 39*cb63e24eSchristos m32c_sim_reg_usp, 40*cb63e24eSchristos m32c_sim_reg_isp, 41*cb63e24eSchristos m32c_sim_reg_pc, 42*cb63e24eSchristos m32c_sim_reg_intb, 43*cb63e24eSchristos m32c_sim_reg_flg, 44*cb63e24eSchristos m32c_sim_reg_svf, 45*cb63e24eSchristos m32c_sim_reg_svp, 46*cb63e24eSchristos m32c_sim_reg_vct, 47*cb63e24eSchristos m32c_sim_reg_dmd0, 48*cb63e24eSchristos m32c_sim_reg_dmd1, 49*cb63e24eSchristos m32c_sim_reg_dct0, 50*cb63e24eSchristos m32c_sim_reg_dct1, 51*cb63e24eSchristos m32c_sim_reg_drc0, 52*cb63e24eSchristos m32c_sim_reg_drc1, 53*cb63e24eSchristos m32c_sim_reg_dma0, 54*cb63e24eSchristos m32c_sim_reg_dma1, 55*cb63e24eSchristos m32c_sim_reg_dsa0, 56*cb63e24eSchristos m32c_sim_reg_dsa1, 57*cb63e24eSchristos m32c_sim_reg_dra0, 58*cb63e24eSchristos m32c_sim_reg_dra1, 59*cb63e24eSchristos m32c_sim_reg_num_regs 60*cb63e24eSchristos }; 61*cb63e24eSchristos 62*cb63e24eSchristos #endif /* SIM_M32C_H */ 63