1*53d1339bSjoerg# $NetBSD: Makefile,v 1.2 2021/05/30 01:56:55 joerg Exp $ 276c7fc5fSjoerg 376c7fc5fSjoergLIB= LLVMX86CodeGen 476c7fc5fSjoerg 576c7fc5fSjoerg.include <bsd.init.mk> 676c7fc5fSjoerg 776c7fc5fSjoerg.PATH: ${LLVM_SRCDIR}/lib/Target/X86 876c7fc5fSjoerg 976c7fc5fSjoergSRCS+= X86AsmPrinter.cpp \ 1076c7fc5fSjoerg X86AvoidStoreForwardingBlocks.cpp \ 1176c7fc5fSjoerg X86AvoidTrailingCall.cpp \ 1276c7fc5fSjoerg X86CallFrameOptimization.cpp \ 1376c7fc5fSjoerg X86CallingConv.cpp \ 1476c7fc5fSjoerg X86CallLowering.cpp \ 1576c7fc5fSjoerg X86CmovConversion.cpp \ 1676c7fc5fSjoerg X86DiscriminateMemOps.cpp \ 1776c7fc5fSjoerg X86DomainReassignment.cpp \ 1876c7fc5fSjoerg X86EvexToVex.cpp\ 1976c7fc5fSjoerg X86ExpandPseudo.cpp \ 2076c7fc5fSjoerg X86FastISel.cpp \ 21*53d1339bSjoerg X86FastTileConfig.cpp \ 2276c7fc5fSjoerg X86FixupBWInsts.cpp \ 2376c7fc5fSjoerg X86FixupLEAs.cpp \ 2476c7fc5fSjoerg X86FixupSetCC.cpp \ 2576c7fc5fSjoerg X86FlagsCopyLowering.cpp \ 2676c7fc5fSjoerg X86FloatingPoint.cpp \ 2776c7fc5fSjoerg X86FrameLowering.cpp \ 2876c7fc5fSjoerg X86IndirectBranchTracking.cpp \ 29*53d1339bSjoerg X86IndirectThunks.cpp \ 3076c7fc5fSjoerg X86InsertPrefetch.cpp \ 31*53d1339bSjoerg X86InsertWait.cpp \ 32*53d1339bSjoerg X86InstCombineIntrinsic.cpp \ 3376c7fc5fSjoerg X86InstrFMA3Info.cpp \ 3476c7fc5fSjoerg X86InstrFoldTables.cpp \ 3576c7fc5fSjoerg X86InstrInfo.cpp \ 3676c7fc5fSjoerg X86InstructionSelector.cpp \ 3776c7fc5fSjoerg X86InterleavedAccess.cpp \ 3876c7fc5fSjoerg X86ISelDAGToDAG.cpp \ 3976c7fc5fSjoerg X86ISelLowering.cpp \ 4076c7fc5fSjoerg X86LegalizerInfo.cpp \ 41*53d1339bSjoerg X86LoadValueInjectionLoadHardening.cpp \ 42*53d1339bSjoerg X86LoadValueInjectionRetHardening.cpp \ 43*53d1339bSjoerg X86LowerAMXIntrinsics.cpp \ 44*53d1339bSjoerg X86LowerAMXType.cpp \ 45*53d1339bSjoerg X86LowerTileCopy.cpp \ 4676c7fc5fSjoerg X86MachineFunctionInfo.cpp \ 4776c7fc5fSjoerg X86MacroFusion.cpp \ 4876c7fc5fSjoerg X86MCInstLower.cpp \ 4976c7fc5fSjoerg X86OptimizeLEAs.cpp \ 5076c7fc5fSjoerg X86PadShortFunction.cpp \ 51*53d1339bSjoerg X86PartialReduction.cpp \ 52*53d1339bSjoerg X86PreAMXConfig.cpp \ 53*53d1339bSjoerg X86PreTileConfig.cpp \ 5476c7fc5fSjoerg X86RegisterBankInfo.cpp \ 5576c7fc5fSjoerg X86RegisterInfo.cpp \ 5676c7fc5fSjoerg X86SelectionDAGInfo.cpp \ 5776c7fc5fSjoerg X86ShuffleDecodeConstantPool.cpp \ 58*53d1339bSjoerg X86SpeculativeExecutionSideEffectSuppression.cpp \ 5976c7fc5fSjoerg X86SpeculativeLoadHardening.cpp \ 6076c7fc5fSjoerg X86Subtarget.cpp \ 6176c7fc5fSjoerg X86TargetMachine.cpp \ 6276c7fc5fSjoerg X86TargetObjectFile.cpp \ 6376c7fc5fSjoerg X86TargetTransformInfo.cpp \ 64*53d1339bSjoerg X86TileConfig.cpp \ 6576c7fc5fSjoerg X86VZeroUpper.cpp \ 6676c7fc5fSjoerg X86WinAllocaExpander.cpp \ 6776c7fc5fSjoerg X86WinEHState.cpp 6876c7fc5fSjoerg 6976c7fc5fSjoergTABLEGEN_SRC= X86.td 7076c7fc5fSjoergTABLEGEN_INCLUDES= -I${LLVM_SRCDIR}/lib/Target/X86 7176c7fc5fSjoergTABLEGEN_OUTPUT= \ 7276c7fc5fSjoerg X86GenAsmMatcher.inc|-gen-asm-matcher \ 7376c7fc5fSjoerg X86GenAsmWriter.inc|-gen-asm-writer \ 7476c7fc5fSjoerg X86GenAsmWriter1.inc|-gen-asm-writer^-asmwriternum=1 \ 7576c7fc5fSjoerg X86GenCallingConv.inc|-gen-callingconv \ 7676c7fc5fSjoerg X86GenDAGISel.inc|-gen-dag-isel \ 7776c7fc5fSjoerg X86GenDisassemblerTables.inc|-gen-disassembler \ 7876c7fc5fSjoerg X86GenEVEX2VEXTables.inc|-gen-x86-EVEX2VEX-tables \ 7976c7fc5fSjoerg X86GenFastISel.inc|-gen-fast-isel \ 8076c7fc5fSjoerg X86GenGlobalISel.inc|-gen-global-isel \ 8176c7fc5fSjoerg X86GenInstrInfo.inc|-gen-instr-info \ 8276c7fc5fSjoerg X86GenRegisterBank.inc|-gen-register-bank \ 8376c7fc5fSjoerg X86GenRegisterInfo.inc|-gen-register-info \ 8476c7fc5fSjoerg X86GenSubtargetInfo.inc|-gen-subtarget 8576c7fc5fSjoerg 8676c7fc5fSjoerg.include "${.PARSEDIR}/../../tablegen.mk" 8776c7fc5fSjoerg 8876c7fc5fSjoerg.if defined(HOSTLIB) 8976c7fc5fSjoerg.include <bsd.hostlib.mk> 9076c7fc5fSjoerg.else 9176c7fc5fSjoerg.include <bsd.lib.mk> 9276c7fc5fSjoerg.endif 93