1*76c7fc5fSjoerg# $NetBSD: Makefile,v 1.1 2019/11/11 22:45:11 joerg Exp $ 2*76c7fc5fSjoerg 3*76c7fc5fSjoergLIB= LLVMSparcCodeGen 4*76c7fc5fSjoerg 5*76c7fc5fSjoerg.include <bsd.init.mk> 6*76c7fc5fSjoerg 7*76c7fc5fSjoerg.PATH: ${LLVM_SRCDIR}/lib/Target/Sparc 8*76c7fc5fSjoerg 9*76c7fc5fSjoergSRCS+= DelaySlotFiller.cpp \ 10*76c7fc5fSjoerg LeonPasses.cpp \ 11*76c7fc5fSjoerg SparcAsmPrinter.cpp \ 12*76c7fc5fSjoerg SparcInstrInfo.cpp \ 13*76c7fc5fSjoerg SparcISelDAGToDAG.cpp \ 14*76c7fc5fSjoerg SparcISelLowering.cpp \ 15*76c7fc5fSjoerg SparcFrameLowering.cpp \ 16*76c7fc5fSjoerg SparcMCInstLower.cpp \ 17*76c7fc5fSjoerg SparcMachineFunctionInfo.cpp \ 18*76c7fc5fSjoerg SparcRegisterInfo.cpp \ 19*76c7fc5fSjoerg SparcSubtarget.cpp \ 20*76c7fc5fSjoerg SparcTargetMachine.cpp \ 21*76c7fc5fSjoerg SparcTargetObjectFile.cpp 22*76c7fc5fSjoerg 23*76c7fc5fSjoergTABLEGEN_SRC= Sparc.td 24*76c7fc5fSjoergTABLEGEN_INCLUDES= -I${LLVM_SRCDIR}/lib/Target/Sparc 25*76c7fc5fSjoergTABLEGEN_OUTPUT= \ 26*76c7fc5fSjoerg SparcGenDAGISel.inc|-gen-dag-isel \ 27*76c7fc5fSjoerg SparcGenAsmMatcher.inc|-gen-asm-matcher \ 28*76c7fc5fSjoerg SparcGenAsmWriter.inc|-gen-asm-writer \ 29*76c7fc5fSjoerg SparcGenCallingConv.inc|-gen-callingconv \ 30*76c7fc5fSjoerg SparcGenCodeEmitter.inc|-gen-emitter \ 31*76c7fc5fSjoerg SparcGenDisassemblerTables.inc|-gen-disassembler \ 32*76c7fc5fSjoerg SparcGenInstrInfo.inc|-gen-instr-info \ 33*76c7fc5fSjoerg SparcGenMCCodeEmitter.inc|-gen-emitter \ 34*76c7fc5fSjoerg SparcGenRegisterInfo.inc|-gen-register-info \ 35*76c7fc5fSjoerg SparcGenSubtargetInfo.inc|-gen-subtarget 36*76c7fc5fSjoerg 37*76c7fc5fSjoerg.include "${.PARSEDIR}/../../tablegen.mk" 38*76c7fc5fSjoerg 39*76c7fc5fSjoerg.if defined(HOSTLIB) 40*76c7fc5fSjoerg.include <bsd.hostlib.mk> 41*76c7fc5fSjoerg.else 42*76c7fc5fSjoerg.include <bsd.lib.mk> 43*76c7fc5fSjoerg.endif 44