1*76c7fc5fSjoerg# $NetBSD: Makefile,v 1.1 2019/11/11 22:45:09 joerg Exp $ 2*76c7fc5fSjoerg 3*76c7fc5fSjoergLIB= LLVMMipsCodeGen 4*76c7fc5fSjoerg 5*76c7fc5fSjoerg.include <bsd.init.mk> 6*76c7fc5fSjoerg 7*76c7fc5fSjoerg.PATH: ${LLVM_SRCDIR}/lib/Target/Mips 8*76c7fc5fSjoerg 9*76c7fc5fSjoergSRCS+= MicroMipsSizeReduction.cpp \ 10*76c7fc5fSjoerg Mips16FrameLowering.cpp \ 11*76c7fc5fSjoerg Mips16HardFloat.cpp \ 12*76c7fc5fSjoerg Mips16HardFloatInfo.cpp \ 13*76c7fc5fSjoerg Mips16InstrInfo.cpp \ 14*76c7fc5fSjoerg Mips16ISelDAGToDAG.cpp \ 15*76c7fc5fSjoerg Mips16ISelLowering.cpp \ 16*76c7fc5fSjoerg Mips16RegisterInfo.cpp \ 17*76c7fc5fSjoerg MipsAnalyzeImmediate.cpp \ 18*76c7fc5fSjoerg MipsAsmPrinter.cpp \ 19*76c7fc5fSjoerg MipsBranchExpansion.cpp \ 20*76c7fc5fSjoerg MipsCallLowering.cpp \ 21*76c7fc5fSjoerg MipsCCState.cpp \ 22*76c7fc5fSjoerg MipsConstantIslandPass.cpp \ 23*76c7fc5fSjoerg MipsDelaySlotFiller.cpp \ 24*76c7fc5fSjoerg MipsExpandPseudo.cpp \ 25*76c7fc5fSjoerg MipsFastISel.cpp \ 26*76c7fc5fSjoerg MipsFrameLowering.cpp \ 27*76c7fc5fSjoerg MipsInstrInfo.cpp \ 28*76c7fc5fSjoerg MipsInstructionSelector.cpp \ 29*76c7fc5fSjoerg MipsISelDAGToDAG.cpp \ 30*76c7fc5fSjoerg MipsISelLowering.cpp \ 31*76c7fc5fSjoerg MipsLegalizerInfo.cpp \ 32*76c7fc5fSjoerg MipsMachineFunction.cpp \ 33*76c7fc5fSjoerg MipsMCInstLower.cpp \ 34*76c7fc5fSjoerg MipsModuleISelDAGToDAG.cpp \ 35*76c7fc5fSjoerg MipsOptimizePICCall.cpp \ 36*76c7fc5fSjoerg MipsOs16.cpp \ 37*76c7fc5fSjoerg MipsPreLegalizerCombiner.cpp \ 38*76c7fc5fSjoerg MipsRegisterBankInfo.cpp \ 39*76c7fc5fSjoerg MipsRegisterInfo.cpp \ 40*76c7fc5fSjoerg MipsSEFrameLowering.cpp \ 41*76c7fc5fSjoerg MipsSEInstrInfo.cpp \ 42*76c7fc5fSjoerg MipsSEISelDAGToDAG.cpp \ 43*76c7fc5fSjoerg MipsSEISelLowering.cpp \ 44*76c7fc5fSjoerg MipsSERegisterInfo.cpp \ 45*76c7fc5fSjoerg MipsSubtarget.cpp \ 46*76c7fc5fSjoerg MipsTargetMachine.cpp \ 47*76c7fc5fSjoerg MipsTargetObjectFile.cpp 48*76c7fc5fSjoerg 49*76c7fc5fSjoergTABLEGEN_SRC= Mips.td 50*76c7fc5fSjoergTABLEGEN_INCLUDES= -I${LLVM_SRCDIR}/lib/Target/Mips 51*76c7fc5fSjoergTABLEGEN_OUTPUT= \ 52*76c7fc5fSjoerg MipsGenAsmMatcher.inc|-gen-asm-matcher \ 53*76c7fc5fSjoerg MipsGenAsmWriter.inc|-gen-asm-writer \ 54*76c7fc5fSjoerg MipsGenCallingConv.inc|-gen-callingconv \ 55*76c7fc5fSjoerg MipsGenCodeEmitter.inc|-gen-emitter \ 56*76c7fc5fSjoerg MipsGenDAGISel.inc|-gen-dag-isel \ 57*76c7fc5fSjoerg MipsGenDisassemblerTables.inc|-gen-disassembler \ 58*76c7fc5fSjoerg MipsGenFastISel.inc|-gen-fast-isel \ 59*76c7fc5fSjoerg MipsGenGlobalISel.inc|-gen-global-isel \ 60*76c7fc5fSjoerg MipsGenInstrInfo.inc|-gen-instr-info \ 61*76c7fc5fSjoerg MipsGenMCCodeEmitter.inc|-gen-emitter \ 62*76c7fc5fSjoerg MipsGenMCPseudoLowering.inc|-gen-pseudo-lowering \ 63*76c7fc5fSjoerg MipsGenRegisterBank.inc|-gen-register-bank \ 64*76c7fc5fSjoerg MipsGenRegisterInfo.inc|-gen-register-info \ 65*76c7fc5fSjoerg MipsGenSubtargetInfo.inc|-gen-subtarget 66*76c7fc5fSjoerg 67*76c7fc5fSjoerg.include "${.PARSEDIR}/../../tablegen.mk" 68*76c7fc5fSjoerg 69*76c7fc5fSjoerg.if defined(HOSTLIB) 70*76c7fc5fSjoerg.include <bsd.hostlib.mk> 71*76c7fc5fSjoerg.else 72*76c7fc5fSjoerg.include <bsd.lib.mk> 73*76c7fc5fSjoerg.endif 74