xref: /minix3/sys/dev/i2c/i2c_io.h (revision 84d9c625bfea59e274550651111ae9edfdc40fbd)
14241cc5dSThomas Cort /*	$NetBSD: i2c_io.h,v 1.3 2012/04/22 14:10:36 pgoyette Exp $	*/
24241cc5dSThomas Cort 
34241cc5dSThomas Cort /*
44241cc5dSThomas Cort  * Copyright (c) 2003 Wasabi Systems, Inc.
54241cc5dSThomas Cort  * All rights reserved.
64241cc5dSThomas Cort  *
74241cc5dSThomas Cort  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
84241cc5dSThomas Cort  *
94241cc5dSThomas Cort  * Redistribution and use in source and binary forms, with or without
104241cc5dSThomas Cort  * modification, are permitted provided that the following conditions
114241cc5dSThomas Cort  * are met:
124241cc5dSThomas Cort  * 1. Redistributions of source code must retain the above copyright
134241cc5dSThomas Cort  *    notice, this list of conditions and the following disclaimer.
144241cc5dSThomas Cort  * 2. Redistributions in binary form must reproduce the above copyright
154241cc5dSThomas Cort  *    notice, this list of conditions and the following disclaimer in the
164241cc5dSThomas Cort  *    documentation and/or other materials provided with the distribution.
174241cc5dSThomas Cort  * 3. All advertising materials mentioning features or use of this software
184241cc5dSThomas Cort  *    must display the following acknowledgement:
194241cc5dSThomas Cort  *      This product includes software developed for the NetBSD Project by
204241cc5dSThomas Cort  *      Wasabi Systems, Inc.
214241cc5dSThomas Cort  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
224241cc5dSThomas Cort  *    or promote products derived from this software without specific prior
234241cc5dSThomas Cort  *    written permission.
244241cc5dSThomas Cort  *
254241cc5dSThomas Cort  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
264241cc5dSThomas Cort  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
274241cc5dSThomas Cort  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
284241cc5dSThomas Cort  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
294241cc5dSThomas Cort  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
304241cc5dSThomas Cort  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
314241cc5dSThomas Cort  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
324241cc5dSThomas Cort  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
334241cc5dSThomas Cort  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
344241cc5dSThomas Cort  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
354241cc5dSThomas Cort  * POSSIBILITY OF SUCH DAMAGE.
364241cc5dSThomas Cort  */
374241cc5dSThomas Cort 
384241cc5dSThomas Cort #ifndef _DEV_I2C_I2C_IO_H_
394241cc5dSThomas Cort #define	_DEV_I2C_I2C_IO_H_
404241cc5dSThomas Cort 
414241cc5dSThomas Cort #include <sys/ioccom.h>
424241cc5dSThomas Cort 
434241cc5dSThomas Cort /* I2C bus address. */
444241cc5dSThomas Cort typedef uint16_t i2c_addr_t;
454241cc5dSThomas Cort 
464241cc5dSThomas Cort /* High-level I2C operations. */
474241cc5dSThomas Cort #define	I2C_OPMASK_STOP		1
484241cc5dSThomas Cort #define	I2C_OPMASK_WRITE	2
494241cc5dSThomas Cort #define	I2C_OPMASK_BLKMODE	4
504241cc5dSThomas Cort 
514241cc5dSThomas Cort #define	I2C_OP_STOP_P(x)	(((int)(x) & I2C_OPMASK_STOP) != 0)
524241cc5dSThomas Cort #define	I2C_OP_WRITE_P(x)	(((int)(x) & I2C_OPMASK_WRITE) != 0)
534241cc5dSThomas Cort #define	I2C_OP_READ_P(x)	(!I2C_OP_WRITE_P(x))
544241cc5dSThomas Cort #define	I2C_OP_BLKMODE_P(x)	(((int)(x) & I2C_OPMASK_BLKMODE) != 0)
554241cc5dSThomas Cort 
564241cc5dSThomas Cort typedef enum {
574241cc5dSThomas Cort         I2C_OP_READ		= 0,
584241cc5dSThomas Cort         I2C_OP_READ_WITH_STOP	= I2C_OPMASK_STOP,
594241cc5dSThomas Cort         I2C_OP_WRITE		= I2C_OPMASK_WRITE,
604241cc5dSThomas Cort         I2C_OP_WRITE_WITH_STOP	= I2C_OPMASK_WRITE   | I2C_OPMASK_STOP,
614241cc5dSThomas Cort         I2C_OP_READ_BLOCK	= I2C_OPMASK_BLKMODE | I2C_OPMASK_STOP,
624241cc5dSThomas Cort         I2C_OP_WRITE_BLOCK	= I2C_OPMASK_BLKMODE | I2C_OPMASK_WRITE |
634241cc5dSThomas Cort 					I2C_OPMASK_STOP,
644241cc5dSThomas Cort } i2c_op_t;
654241cc5dSThomas Cort 
664241cc5dSThomas Cort /*
674241cc5dSThomas Cort  * This structure describes a single I2C control script fragment.
684241cc5dSThomas Cort  *
694241cc5dSThomas Cort  * Note that use of this scripted API allows for support of automated
704241cc5dSThomas Cort  * SMBus controllers.  The following table maps SMBus operations to
714241cc5dSThomas Cort  * script fragment configuration:
724241cc5dSThomas Cort  *
734241cc5dSThomas Cort  *	SMBus "write byte":		I2C_OP_WRITE_WITH_STOP
744241cc5dSThomas Cort  *					cmdlen = 1
754241cc5dSThomas Cort  *
764241cc5dSThomas Cort  *	SMBus "read byte":		I2C_OP_READ_WITH_STOP
774241cc5dSThomas Cort  *					cmdlen = 1
784241cc5dSThomas Cort  *
794241cc5dSThomas Cort  *	SMBus "receive byte":		I2C_OP_READ_WITH_STOP
804241cc5dSThomas Cort  *					cmdlen = 0
814241cc5dSThomas Cort  *
824241cc5dSThomas Cort  * Note that while each of these 3 SMBus operations implies a STOP
834241cc5dSThomas Cort  * (which an automated controller will likely perform automatically),
844241cc5dSThomas Cort  * non-SMBus clients may continue to function even if they issue
854241cc5dSThomas Cort  * I2C_OP_WRITE and I2C_OP_READ.
864241cc5dSThomas Cort  */
874241cc5dSThomas Cort 
884241cc5dSThomas Cort /*
894241cc5dSThomas Cort  * I2C_IOCTL_EXEC:
904241cc5dSThomas Cort  *
914241cc5dSThomas Cort  *	User ioctl to execute an i2c operation.
924241cc5dSThomas Cort  */
934241cc5dSThomas Cort typedef struct i2c_ioctl_exec {
944241cc5dSThomas Cort 	i2c_op_t iie_op;		/* operation to perform */
954241cc5dSThomas Cort 	i2c_addr_t iie_addr;		/* address of device */
964241cc5dSThomas Cort 	const void *iie_cmd;		/* pointer to command */
974241cc5dSThomas Cort 	size_t iie_cmdlen;		/* length of command */
984241cc5dSThomas Cort 	void *iie_buf;			/* pointer to data buffer */
994241cc5dSThomas Cort 	size_t iie_buflen;		/* length of data buffer */
1004241cc5dSThomas Cort } i2c_ioctl_exec_t;
101*84d9c625SLionel Sambuc #if defined(__minix)
102437177b0SThomas Cort #define	I2C_EXEC_MAX_CMDLEN	128
103437177b0SThomas Cort #define	I2C_EXEC_MAX_BUFLEN	128
104*84d9c625SLionel Sambuc #else
105*84d9c625SLionel Sambuc #define	I2C_EXEC_MAX_CMDLEN	32
106*84d9c625SLionel Sambuc #define	I2C_EXEC_MAX_BUFLEN	32
107*84d9c625SLionel Sambuc #endif /* defined(__minix) */
1084241cc5dSThomas Cort 
1094241cc5dSThomas Cort #define	I2C_IOCTL_EXEC		 _IOW('I', 0, i2c_ioctl_exec_t)
1104241cc5dSThomas Cort 
1114241cc5dSThomas Cort #endif /* _DEV_I2C_I2C_IO_H_ */
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