1*bad58c9cSBen Gras #include <sys/types.h> 2*bad58c9cSBen Gras #include <minix/minlib.h> 3*bad58c9cSBen Gras 4*bad58c9cSBen Gras void read_tsc(u32_t * hi,u32_t * lo)5*bad58c9cSBen Grasread_tsc(u32_t *hi, u32_t *lo) 6*bad58c9cSBen Gras { 7*bad58c9cSBen Gras /* Read Clock Cycle Counter (CCNT). Intel calls it Time Stamp Counter (TSC) */ 8*bad58c9cSBen Gras u32_t ccnt; 9*bad58c9cSBen Gras 10*bad58c9cSBen Gras /* Get value from the Performance Monitors Cycle Counter Register. 11*bad58c9cSBen Gras * See ARM Architecture Reference Manual B5.1.113. 12*bad58c9cSBen Gras */ 13*bad58c9cSBen Gras asm volatile ("MRC p15, 0, %0, c9, c13, 0\t\n" : "=r" (ccnt) : : "%0"); 14*bad58c9cSBen Gras 15*bad58c9cSBen Gras /* The ARMv7-A clock cycle counter is only 32-bits, but read_tsc is 16*bad58c9cSBen Gras * expected to return a 64-bit value. hi is therefore always 0. 17*bad58c9cSBen Gras */ 18*bad58c9cSBen Gras *hi = 0; 19*bad58c9cSBen Gras *lo = ccnt; 20*bad58c9cSBen Gras } 21*bad58c9cSBen Gras 22