xref: /minix3/minix/kernel/arch/i386/oxpcie.c (revision 433d6423c39e34ec4b79c950597bb2d236f886be)
1*433d6423SLionel Sambuc 
2*433d6423SLionel Sambuc #include "kernel/kernel.h"
3*433d6423SLionel Sambuc 
4*433d6423SLionel Sambuc #if CONFIG_OXPCIE
5*433d6423SLionel Sambuc 
6*433d6423SLionel Sambuc /* Documentation is at http://www.plxtech.com/products/uart/oxpcie952 */
7*433d6423SLionel Sambuc 
8*433d6423SLionel Sambuc #include "oxpcie.h"
9*433d6423SLionel Sambuc #include "serial.h"
10*433d6423SLionel Sambuc 
11*433d6423SLionel Sambuc static unsigned char *oxpcie_vaddr = NULL;
12*433d6423SLionel Sambuc 
oxpcie_set_vaddr(unsigned char * vaddr)13*433d6423SLionel Sambuc void oxpcie_set_vaddr(unsigned char *vaddr)
14*433d6423SLionel Sambuc {
15*433d6423SLionel Sambuc 	oxpcie_vaddr = vaddr;
16*433d6423SLionel Sambuc }
17*433d6423SLionel Sambuc 
oxpcie_init(void)18*433d6423SLionel Sambuc static void oxpcie_init(void)
19*433d6423SLionel Sambuc {
20*433d6423SLionel Sambuc 	printf("oxpcie_init\n");
21*433d6423SLionel Sambuc 	/* Enable access to EFR and DLM+DLL */
22*433d6423SLionel Sambuc 	OXPCIE_LCR = 0xBF;
23*433d6423SLionel Sambuc 
24*433d6423SLionel Sambuc 	/* Set FICR[1] to increase FIFO */
25*433d6423SLionel Sambuc 	OXPCIE_FICR = 0x01;
26*433d6423SLionel Sambuc 
27*433d6423SLionel Sambuc 	/* Set enhanced mode [4]
28*433d6423SLionel Sambuc 	 * no RTS/CTS [7:6]
29*433d6423SLionel Sambuc 	 * no special char detection [5]
30*433d6423SLionel Sambuc 	 * no in-band receive flow control [1:0]
31*433d6423SLionel Sambuc 	 * no in-band transmit flow control [3:2]
32*433d6423SLionel Sambuc 	 */
33*433d6423SLionel Sambuc 	OXPCIE_EFR  = 0x10;
34*433d6423SLionel Sambuc 
35*433d6423SLionel Sambuc 	/* Set divisor register to 115200 baud. */
36*433d6423SLionel Sambuc 	OXPCIE_DLM = 0x00;
37*433d6423SLionel Sambuc 	OXPCIE_DLL = 0x22;
38*433d6423SLionel Sambuc 
39*433d6423SLionel Sambuc 	/* Forget DLM and DLL, set LCR to config. */
40*433d6423SLionel Sambuc 	OXPCIE_LCR = LCR_CONFIG;
41*433d6423SLionel Sambuc 	OXPCIE_LCR = LCR_CONFIG;
42*433d6423SLionel Sambuc 
43*433d6423SLionel Sambuc 	OXPCIE_TCR = 0x01;
44*433d6423SLionel Sambuc 	OXPCIE_CPR = 0x20;
45*433d6423SLionel Sambuc 	OXPCIE_CPR2 = 0;
46*433d6423SLionel Sambuc }
47*433d6423SLionel Sambuc 
oxpcie_putc(char c)48*433d6423SLionel Sambuc void oxpcie_putc(char c)
49*433d6423SLionel Sambuc {
50*433d6423SLionel Sambuc 	static int inuse = 0;
51*433d6423SLionel Sambuc 
52*433d6423SLionel Sambuc 	if(vm_running && oxpcie_vaddr && !inuse) {
53*433d6423SLionel Sambuc         	int i;
54*433d6423SLionel Sambuc 		static int init_done;
55*433d6423SLionel Sambuc 		inuse = 1;
56*433d6423SLionel Sambuc 
57*433d6423SLionel Sambuc 		if(!init_done) {
58*433d6423SLionel Sambuc 			oxpcie_init();
59*433d6423SLionel Sambuc 			init_done = 1;
60*433d6423SLionel Sambuc 		}
61*433d6423SLionel Sambuc 
62*433d6423SLionel Sambuc         	for (i= 0; i<100000; i++) {
63*433d6423SLionel Sambuc 			if(OXPCIE_LSR & LSR_THRE)
64*433d6423SLionel Sambuc                        		break;
65*433d6423SLionel Sambuc 		}
66*433d6423SLionel Sambuc 		OXPCIE_THR = c;
67*433d6423SLionel Sambuc 		inuse = 0;
68*433d6423SLionel Sambuc 	}
69*433d6423SLionel Sambuc }
70*433d6423SLionel Sambuc 
oxpcie_in(void)71*433d6423SLionel Sambuc int oxpcie_in(void)
72*433d6423SLionel Sambuc {
73*433d6423SLionel Sambuc 	if(vm_running && oxpcie_vaddr) {
74*433d6423SLionel Sambuc 		int lsr;
75*433d6423SLionel Sambuc 		lsr = OXPCIE_LSR;
76*433d6423SLionel Sambuc 		if(lsr & LSR_DR)
77*433d6423SLionel Sambuc 			return (int) OXPCIE_RBR;
78*433d6423SLionel Sambuc 	}
79*433d6423SLionel Sambuc 
80*433d6423SLionel Sambuc 	return -1;
81*433d6423SLionel Sambuc }
82*433d6423SLionel Sambuc 
83*433d6423SLionel Sambuc #endif
84