xref: /minix3/lib/libc/arch/mips/gen/longjmp.c (revision e415d488727a332a2c69df018aa35e2cecf4148a)
1*e415d488SLionel Sambuc /*	$NetBSD: longjmp.c,v 1.5 2012/03/29 19:27:05 christos Exp $	*/
22fe8fb19SBen Gras 
32fe8fb19SBen Gras /*-
42fe8fb19SBen Gras  * Copyright (c) 2003 The NetBSD Foundation, Inc.
52fe8fb19SBen Gras  * All rights reserved.
62fe8fb19SBen Gras  *
72fe8fb19SBen Gras  * This code is derived from software contributed to The NetBSD Foundation
82fe8fb19SBen Gras  * by Christian Limpach and Matt Thomas.
92fe8fb19SBen Gras  *
102fe8fb19SBen Gras  * Redistribution and use in source and binary forms, with or without
112fe8fb19SBen Gras  * modification, are permitted provided that the following conditions
122fe8fb19SBen Gras  * are met:
132fe8fb19SBen Gras  * 1. Redistributions of source code must retain the above copyright
142fe8fb19SBen Gras  *    notice, this list of conditions and the following disclaimer.
152fe8fb19SBen Gras  * 2. Redistributions in binary form must reproduce the above copyright
162fe8fb19SBen Gras  *    notice, this list of conditions and the following disclaimer in the
172fe8fb19SBen Gras  *    documentation and/or other materials provided with the distribution.
182fe8fb19SBen Gras  *
192fe8fb19SBen Gras  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
202fe8fb19SBen Gras  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
212fe8fb19SBen Gras  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
222fe8fb19SBen Gras  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
232fe8fb19SBen Gras  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
242fe8fb19SBen Gras  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
252fe8fb19SBen Gras  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
262fe8fb19SBen Gras  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
272fe8fb19SBen Gras  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
282fe8fb19SBen Gras  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
292fe8fb19SBen Gras  * POSSIBILITY OF SUCH DAMAGE.
302fe8fb19SBen Gras  */
312fe8fb19SBen Gras 
322fe8fb19SBen Gras #include "namespace.h"
332fe8fb19SBen Gras #include <sys/types.h>
342fe8fb19SBen Gras #include <ucontext.h>
352fe8fb19SBen Gras #include <signal.h>
362fe8fb19SBen Gras #include <stdlib.h>
372fe8fb19SBen Gras #include <string.h>
382fe8fb19SBen Gras 
392fe8fb19SBen Gras #include <machine/regnum.h>
402fe8fb19SBen Gras 
412fe8fb19SBen Gras #define __LIBC12_SOURCE__
422fe8fb19SBen Gras #include <setjmp.h>
432fe8fb19SBen Gras #include <compat/include/setjmp.h>
442fe8fb19SBen Gras 
452fe8fb19SBen Gras void
__longjmp14(jmp_buf env,int val)462fe8fb19SBen Gras __longjmp14(jmp_buf env, int val)
472fe8fb19SBen Gras {
482fe8fb19SBen Gras 	struct sigcontext *sc = (void *)env;
492fe8fb19SBen Gras 	ucontext_t uc;
502fe8fb19SBen Gras 
512fe8fb19SBen Gras 	/* Ensure non-zero SP and sigcontext magic number is present */
52*e415d488SLionel Sambuc 	if (sc->sc_regs[_R_SP] == 0 || sc->sc_regs[_R_ZERO] != (mips_reg_t)0xACEDBADEU)
532fe8fb19SBen Gras 		goto err;
542fe8fb19SBen Gras 
552fe8fb19SBen Gras 	/* Ensure non-zero return value */
562fe8fb19SBen Gras 	if (val == 0)
572fe8fb19SBen Gras 		val = 1;
582fe8fb19SBen Gras 
592fe8fb19SBen Gras 	/*
602fe8fb19SBen Gras 	 * Set _UC_{SET,CLR}STACK according to SS_ONSTACK.
612fe8fb19SBen Gras 	 *
622fe8fb19SBen Gras 	 * Restore the signal mask with sigprocmask() instead of _UC_SIGMASK,
632fe8fb19SBen Gras 	 * since libpthread may want to interpose on signal handling.
642fe8fb19SBen Gras 	 */
652fe8fb19SBen Gras 	uc.uc_flags = _UC_CPU | (sc->sc_onstack ? _UC_SETSTACK : _UC_CLRSTACK);
662fe8fb19SBen Gras 
672fe8fb19SBen Gras 	sigprocmask(SIG_SETMASK, &sc->sc_mask, NULL);
682fe8fb19SBen Gras 
692fe8fb19SBen Gras 	/* Clear uc_link */
702fe8fb19SBen Gras 	uc.uc_link = 0;
712fe8fb19SBen Gras 
722fe8fb19SBen Gras 	/* Save return value in context */
732fe8fb19SBen Gras 	uc.uc_mcontext.__gregs[_REG_V0] = val;
742fe8fb19SBen Gras 
752fe8fb19SBen Gras 	/* Copy saved registers */
762fe8fb19SBen Gras 	uc.uc_mcontext.__gregs[_REG_S0] = sc->sc_regs[_R_S0];
772fe8fb19SBen Gras 	uc.uc_mcontext.__gregs[_REG_S1] = sc->sc_regs[_R_S1];
782fe8fb19SBen Gras 	uc.uc_mcontext.__gregs[_REG_S2] = sc->sc_regs[_R_S2];
792fe8fb19SBen Gras 	uc.uc_mcontext.__gregs[_REG_S3] = sc->sc_regs[_R_S3];
802fe8fb19SBen Gras 	uc.uc_mcontext.__gregs[_REG_S4] = sc->sc_regs[_R_S4];
812fe8fb19SBen Gras 	uc.uc_mcontext.__gregs[_REG_S5] = sc->sc_regs[_R_S5];
822fe8fb19SBen Gras 	uc.uc_mcontext.__gregs[_REG_S6] = sc->sc_regs[_R_S6];
832fe8fb19SBen Gras 	uc.uc_mcontext.__gregs[_REG_S7] = sc->sc_regs[_R_S7];
842fe8fb19SBen Gras 	uc.uc_mcontext.__gregs[_REG_S8] = sc->sc_regs[_R_S8];
852fe8fb19SBen Gras #if defined(__mips_n32) || defined(__mips_n64)
862fe8fb19SBen Gras 	uc.uc_mcontext.__gregs[_REG_GP] = sc->sc_regs[_R_GP];
872fe8fb19SBen Gras #endif
882fe8fb19SBen Gras 	uc.uc_mcontext.__gregs[_REG_SP] = sc->sc_regs[_R_SP];
892fe8fb19SBen Gras 	uc.uc_mcontext.__gregs[_REG_RA] = sc->sc_regs[_R_RA];
902fe8fb19SBen Gras 	uc.uc_mcontext.__gregs[_REG_EPC] = sc->sc_pc;
912fe8fb19SBen Gras 
922fe8fb19SBen Gras 	/* Copy FP state */
932fe8fb19SBen Gras 	if (sc->sc_fpused) {
942fe8fb19SBen Gras 		/* FP saved regs are $f20 .. $f31 */
952fe8fb19SBen Gras 		memcpy(&uc.uc_mcontext.__fpregs.__fp_r.__fp_regs[20],
962fe8fb19SBen Gras 		    &sc->sc_fpregs[20], 32 - 20);
972fe8fb19SBen Gras 		uc.uc_mcontext.__fpregs.__fp_csr =
982fe8fb19SBen Gras 		    sc->sc_fpregs[_R_FSR - _FPBASE];
992fe8fb19SBen Gras 		/* XXX sc_fp_control */
1002fe8fb19SBen Gras 		uc.uc_flags |= _UC_FPU;
1012fe8fb19SBen Gras 	}
1022fe8fb19SBen Gras 
1032fe8fb19SBen Gras 	setcontext(&uc);
1042fe8fb19SBen Gras  err:
1052fe8fb19SBen Gras 	longjmperror();
1062fe8fb19SBen Gras 	abort();
1072fe8fb19SBen Gras 	/* NOTREACHED */
1082fe8fb19SBen Gras }
109