xref: /minix3/external/bsd/llvm/dist/llvm/test/CodeGen/X86/early-ifcvt-crash.ll (revision f4a2713ac843a11c696ec80c0a5e3e5d80b4d338)
1*f4a2713aSLionel Sambuc; RUN: llc < %s -x86-early-ifcvt -verify-machineinstrs
2*f4a2713aSLionel Sambuc; RUN: llc < %s -x86-early-ifcvt -stress-early-ifcvt -verify-machineinstrs
3*f4a2713aSLionel Sambuc; CPU without a scheduling model:
4*f4a2713aSLionel Sambuc; RUN: llc < %s -x86-early-ifcvt -mcpu=pentium3 -verify-machineinstrs
5*f4a2713aSLionel Sambuc;
6*f4a2713aSLionel Sambuc; Run these tests with and without -stress-early-ifcvt to exercise heuristics.
7*f4a2713aSLionel Sambuc;
8*f4a2713aSLionel Sambuctarget triple = "x86_64-apple-macosx10.8.0"
9*f4a2713aSLionel Sambuc
10*f4a2713aSLionel Sambuc; MachineTraceMetrics::Ensemble::addLiveIns crashes because the first operand
11*f4a2713aSLionel Sambuc; on an inline asm instruction is not a vreg def.
12*f4a2713aSLionel Sambuc; <rdar://problem/12472811>
13*f4a2713aSLionel Sambucdefine void @f1() nounwind {
14*f4a2713aSLionel Sambucentry:
15*f4a2713aSLionel Sambuc  br i1 undef, label %if.then6.i, label %if.end.i
16*f4a2713aSLionel Sambuc
17*f4a2713aSLionel Sambucif.then6.i:
18*f4a2713aSLionel Sambuc  br label %if.end.i
19*f4a2713aSLionel Sambuc
20*f4a2713aSLionel Sambucif.end.i:
21*f4a2713aSLionel Sambuc  br i1 undef, label %if.end25.i, label %if.else17.i
22*f4a2713aSLionel Sambuc
23*f4a2713aSLionel Sambucif.else17.i:
24*f4a2713aSLionel Sambuc  %shl24.i = shl i32 undef, undef
25*f4a2713aSLionel Sambuc  br label %if.end25.i
26*f4a2713aSLionel Sambuc
27*f4a2713aSLionel Sambucif.end25.i:
28*f4a2713aSLionel Sambuc  %storemerge31.i = phi i32 [ %shl24.i, %if.else17.i ], [ 0, %if.end.i ]
29*f4a2713aSLionel Sambuc  store i32 %storemerge31.i, i32* undef, align 4
30*f4a2713aSLionel Sambuc  %0 = tail call i32 asm sideeffect "", "=r,r,i,i"(i32 undef, i32 15, i32 1) nounwind
31*f4a2713aSLionel Sambuc  %conv = trunc i32 %0 to i8
32*f4a2713aSLionel Sambuc  store i8 %conv, i8* undef, align 1
33*f4a2713aSLionel Sambuc  unreachable
34*f4a2713aSLionel Sambuc}
35