1*f4a2713aSLionel Sambuc; The register allocator can commute two-address instructions to avoid 2*f4a2713aSLionel Sambuc; insertion of register-register copies. 3*f4a2713aSLionel Sambuc 4*f4a2713aSLionel Sambuc; Make sure there are only 3 mov's for each testcase 5*f4a2713aSLionel Sambuc; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mcpu=corei7 | FileCheck %s -check-prefix=LINUX 6*f4a2713aSLionel Sambuc; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s -check-prefix=DARWIN 7*f4a2713aSLionel Sambuc 8*f4a2713aSLionel Sambuc 9*f4a2713aSLionel Sambuc@G = external global i32 ; <i32*> [#uses=2] 10*f4a2713aSLionel Sambuc 11*f4a2713aSLionel Sambucdeclare void @ext(i32) 12*f4a2713aSLionel Sambuc 13*f4a2713aSLionel Sambucdefine i32 @t1(i32 %X, i32 %Y) nounwind { 14*f4a2713aSLionel Sambuc; LINUX-LABEL: t1: 15*f4a2713aSLionel Sambuc; LINUX: movl 4(%esp), %eax 16*f4a2713aSLionel Sambuc; LINUX: movl 8(%esp), %ecx 17*f4a2713aSLionel Sambuc; LINUX: addl %eax, %ecx 18*f4a2713aSLionel Sambuc; LINUX: movl %ecx, G 19*f4a2713aSLionel Sambuc %Z = add i32 %X, %Y ; <i32> [#uses=1] 20*f4a2713aSLionel Sambuc store i32 %Z, i32* @G 21*f4a2713aSLionel Sambuc ret i32 %X 22*f4a2713aSLionel Sambuc} 23*f4a2713aSLionel Sambuc 24*f4a2713aSLionel Sambucdefine i32 @t2(i32 %X, i32 %Y) nounwind { 25*f4a2713aSLionel Sambuc; LINUX-LABEL: t2: 26*f4a2713aSLionel Sambuc; LINUX: movl 4(%esp), %eax 27*f4a2713aSLionel Sambuc; LINUX: movl 8(%esp), %ecx 28*f4a2713aSLionel Sambuc; LINUX: xorl %eax, %ecx 29*f4a2713aSLionel Sambuc; LINUX: movl %ecx, G 30*f4a2713aSLionel Sambuc %Z = xor i32 %X, %Y ; <i32> [#uses=1] 31*f4a2713aSLionel Sambuc store i32 %Z, i32* @G 32*f4a2713aSLionel Sambuc ret i32 %X 33*f4a2713aSLionel Sambuc} 34*f4a2713aSLionel Sambuc 35*f4a2713aSLionel Sambuc; rdar://8762995 36*f4a2713aSLionel Sambuc%0 = type { i64, i32 } 37*f4a2713aSLionel Sambuc 38*f4a2713aSLionel Sambucdefine %0 @t3(i32 %lb, i8 zeroext %has_lb, i8 zeroext %lb_inclusive, i32 %ub, i8 zeroext %has_ub, i8 zeroext %ub_inclusive) nounwind { 39*f4a2713aSLionel Sambucentry: 40*f4a2713aSLionel Sambuc; DARWIN-LABEL: t3: 41*f4a2713aSLionel Sambuc; DARWIN: shlq $32, %rcx 42*f4a2713aSLionel Sambuc; DARWIN-NEXT: orq %rcx, %rax 43*f4a2713aSLionel Sambuc; DARWIN-NEXT: shll $8 44*f4a2713aSLionel Sambuc; DARWIN-NOT: leaq 45*f4a2713aSLionel Sambuc %tmp21 = zext i32 %lb to i64 46*f4a2713aSLionel Sambuc %tmp23 = zext i32 %ub to i64 47*f4a2713aSLionel Sambuc %tmp24 = shl i64 %tmp23, 32 48*f4a2713aSLionel Sambuc %ins26 = or i64 %tmp24, %tmp21 49*f4a2713aSLionel Sambuc %tmp28 = zext i8 %has_lb to i32 50*f4a2713aSLionel Sambuc %tmp33 = zext i8 %has_ub to i32 51*f4a2713aSLionel Sambuc %tmp34 = shl i32 %tmp33, 8 52*f4a2713aSLionel Sambuc %tmp38 = zext i8 %lb_inclusive to i32 53*f4a2713aSLionel Sambuc %tmp39 = shl i32 %tmp38, 16 54*f4a2713aSLionel Sambuc %tmp43 = zext i8 %ub_inclusive to i32 55*f4a2713aSLionel Sambuc %tmp44 = shl i32 %tmp43, 24 56*f4a2713aSLionel Sambuc %ins31 = or i32 %tmp39, %tmp28 57*f4a2713aSLionel Sambuc %ins36 = or i32 %ins31, %tmp34 58*f4a2713aSLionel Sambuc %ins46 = or i32 %ins36, %tmp44 59*f4a2713aSLionel Sambuc %tmp16 = insertvalue %0 undef, i64 %ins26, 0 60*f4a2713aSLionel Sambuc %tmp19 = insertvalue %0 %tmp16, i32 %ins46, 1 61*f4a2713aSLionel Sambuc ret %0 %tmp19 62*f4a2713aSLionel Sambuc} 63