1*f4a2713aSLionel Sambuc // REQUIRES: arm-registered-target
2*f4a2713aSLionel Sambuc // RUN: %clang_cc1 -triple thumbv7-apple-darwin \
3*f4a2713aSLionel Sambuc // RUN: -target-abi apcs-gnu \
4*f4a2713aSLionel Sambuc // RUN: -target-cpu cortex-a8 \
5*f4a2713aSLionel Sambuc // RUN: -mfloat-abi soft \
6*f4a2713aSLionel Sambuc // RUN: -target-feature +soft-float-abi \
7*f4a2713aSLionel Sambuc // RUN: -ffreestanding \
8*f4a2713aSLionel Sambuc // RUN: -emit-llvm -w -o - %s | FileCheck %s
9*f4a2713aSLionel Sambuc
10*f4a2713aSLionel Sambuc #include <arm_neon.h>
11*f4a2713aSLionel Sambuc
12*f4a2713aSLionel Sambuc // Radar 9311427: Check that alignment specifier is used in Neon load/store
13*f4a2713aSLionel Sambuc // intrinsics.
14*f4a2713aSLionel Sambuc typedef float AlignedAddr __attribute__ ((aligned (16)));
t1(AlignedAddr * addr1,AlignedAddr * addr2)15*f4a2713aSLionel Sambuc void t1(AlignedAddr *addr1, AlignedAddr *addr2) {
16*f4a2713aSLionel Sambuc // CHECK: @t1
17*f4a2713aSLionel Sambuc // CHECK: call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %{{.*}}, i32 16)
18*f4a2713aSLionel Sambuc float32x4_t a = vld1q_f32(addr1);
19*f4a2713aSLionel Sambuc // CHECK: call void @llvm.arm.neon.vst1.v4f32(i8* %{{.*}}, <4 x float> %{{.*}}, i32 16)
20*f4a2713aSLionel Sambuc vst1q_f32(addr2, a);
21*f4a2713aSLionel Sambuc }
22*f4a2713aSLionel Sambuc
23*f4a2713aSLionel Sambuc // Radar 10538555: Make sure unaligned load/stores do not gain alignment.
t2(char * addr)24*f4a2713aSLionel Sambuc void t2(char *addr) {
25*f4a2713aSLionel Sambuc // CHECK: @t2
26*f4a2713aSLionel Sambuc // CHECK: load i32* %{{.*}}, align 1
27*f4a2713aSLionel Sambuc int32x2_t vec = vld1_dup_s32(addr);
28*f4a2713aSLionel Sambuc // CHECK: store i32 %{{.*}}, i32* {{.*}}, align 1
29*f4a2713aSLionel Sambuc vst1_lane_s32(addr, vec, 1);
30*f4a2713aSLionel Sambuc }
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