1*f14fb602SLionel Sambuc/* $NetBSD: ffs.S,v 1.3 2011/07/04 12:18:05 mrg Exp $ */ 2b6cbf720SGianluca Guida 3b6cbf720SGianluca Guida/*- 4b6cbf720SGianluca Guida * Copyright (c) 2002 The NetBSD Foundation, Inc. 5b6cbf720SGianluca Guida * All rights reserved. 6b6cbf720SGianluca Guida * 7b6cbf720SGianluca Guida * This code is derived from software contributed to The NetBSD Foundation 8b6cbf720SGianluca Guida * by ITOH Yasufumi. 9b6cbf720SGianluca Guida * 10b6cbf720SGianluca Guida * Redistribution and use in source and binary forms, with or without 11b6cbf720SGianluca Guida * modification, are permitted provided that the following conditions 12b6cbf720SGianluca Guida * are met: 13b6cbf720SGianluca Guida * 1. Redistributions of source code must retain the above copyright 14b6cbf720SGianluca Guida * notice, this list of conditions and the following disclaimer. 15b6cbf720SGianluca Guida * 2. Redistributions in binary form must reproduce the above copyright 16b6cbf720SGianluca Guida * notice, this list of conditions and the following disclaimer in the 17b6cbf720SGianluca Guida * documentation and/or other materials provided with the distribution. 18b6cbf720SGianluca Guida * 19b6cbf720SGianluca Guida * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20b6cbf720SGianluca Guida * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21b6cbf720SGianluca Guida * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22b6cbf720SGianluca Guida * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23b6cbf720SGianluca Guida * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24b6cbf720SGianluca Guida * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25b6cbf720SGianluca Guida * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26b6cbf720SGianluca Guida * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27b6cbf720SGianluca Guida * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28b6cbf720SGianluca Guida * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29b6cbf720SGianluca Guida * POSSIBILITY OF SUCH DAMAGE. 30b6cbf720SGianluca Guida */ 31b6cbf720SGianluca Guida 32b6cbf720SGianluca Guida#include <machine/asm.h> 33b6cbf720SGianluca Guida 34b6cbf720SGianluca Guida#if defined(LIBC_SCCS) && !defined(lint) 35*f14fb602SLionel Sambuc RCSID("$NetBSD: ffs.S,v 1.3 2011/07/04 12:18:05 mrg Exp $") 36b6cbf720SGianluca Guida#endif 37b6cbf720SGianluca Guida 38b6cbf720SGianluca Guida/* 39b6cbf720SGianluca Guida * ffs - find first bit set 40b6cbf720SGianluca Guida * 41b6cbf720SGianluca Guida * This code makes use of ``test 8bit'' and ``shift 8bit'' instructions. 42b6cbf720SGianluca Guida * The remaining 8bit is tested in every 2bit. 43b6cbf720SGianluca Guida */ 44b6cbf720SGianluca Guida 45*f14fb602SLionel SambucWEAK_ALIAS(__ffssi2,ffs) 46b6cbf720SGianluca GuidaENTRY(ffs) 47b6cbf720SGianluca Guida mov r4,r0 ! using r0 specific instructions 48b6cbf720SGianluca Guida tst #0xff,r0 49b6cbf720SGianluca Guida bf/s L8bit 50b6cbf720SGianluca Guida mov #0+1,r1 ! ret = 1..8 51b6cbf720SGianluca Guida 52b6cbf720SGianluca Guida tst r0,r0 ! ffs(0) is 0 53b6cbf720SGianluca Guida bt Lzero ! testing here to accelerate ret=1..8 cases 54b6cbf720SGianluca Guida 55b6cbf720SGianluca Guida shlr8 r0 56b6cbf720SGianluca Guida tst #0xff,r0 57b6cbf720SGianluca Guida bf/s L8bit 58b6cbf720SGianluca Guida mov #8+1,r1 ! ret = 9..16 59b6cbf720SGianluca Guida 60b6cbf720SGianluca Guida shlr8 r0 61b6cbf720SGianluca Guida tst #0xff,r0 62b6cbf720SGianluca Guida bf/s L8bit 63b6cbf720SGianluca Guida mov #16+1,r1 ! ret = 17..24 64b6cbf720SGianluca Guida 65b6cbf720SGianluca Guida shlr8 r0 66b6cbf720SGianluca Guida mov #24+1,r1 ! ret = 25..32 67b6cbf720SGianluca Guida 68b6cbf720SGianluca GuidaL8bit: 69b6cbf720SGianluca Guida tst #0x0f,r0 70b6cbf720SGianluca Guida bt 4f 71b6cbf720SGianluca Guida 72b6cbf720SGianluca Guida tst #0x03,r0 73b6cbf720SGianluca Guida bt 2f 74b6cbf720SGianluca Guida tst #0x01,r0 ! not bit 0 -> T 75b6cbf720SGianluca Guida mov #0,r0 76b6cbf720SGianluca Guida rts 77b6cbf720SGianluca Guida addc r1,r0 ! 0 + r1 + T -> r0 78b6cbf720SGianluca Guida 79b6cbf720SGianluca Guida2: tst #0x04,r0 80b6cbf720SGianluca Guida mov #2,r0 81b6cbf720SGianluca Guida rts 82b6cbf720SGianluca Guida addc r1,r0 83b6cbf720SGianluca Guida 84b6cbf720SGianluca Guida4: tst #0x30,r0 85b6cbf720SGianluca Guida bt 6f 86b6cbf720SGianluca Guida tst #0x10,r0 87b6cbf720SGianluca Guida mov #4,r0 88b6cbf720SGianluca Guida rts 89b6cbf720SGianluca Guida addc r1,r0 90b6cbf720SGianluca Guida 91b6cbf720SGianluca Guida6: tst #0x40,r0 92b6cbf720SGianluca Guida mov #6,r0 93b6cbf720SGianluca Guida rts 94b6cbf720SGianluca Guida addc r1,r0 95b6cbf720SGianluca Guida 96b6cbf720SGianluca GuidaLzero: rts 97b6cbf720SGianluca Guida nop 98