xref: /minix3/common/lib/libc/arch/mips/atomic/atomic_or.S (revision f14fb602092e015ff630df58e17c2a9cd57d29b3)
1*f14fb602SLionel Sambuc/*	$NetBSD: atomic_or.S,v 1.4 2012/03/14 16:50:34 christos Exp $	*/
2b6cbf720SGianluca Guida
3b6cbf720SGianluca Guida/*-
4b6cbf720SGianluca Guida * Copyright (c) 2008 The NetBSD Foundation, Inc.
5b6cbf720SGianluca Guida * All rights reserved.
6b6cbf720SGianluca Guida *
7b6cbf720SGianluca Guida * Redistribution and use in source and binary forms, with or without
8b6cbf720SGianluca Guida * modification, are permitted provided that the following conditions
9b6cbf720SGianluca Guida * are met:
10b6cbf720SGianluca Guida * 1. Redistributions of source code must retain the above copyright
11b6cbf720SGianluca Guida *    notice, this list of conditions and the following disclaimer.
12b6cbf720SGianluca Guida * 2. Redistributions in binary form must reproduce the above copyright
13b6cbf720SGianluca Guida *    notice, this list of conditions and the following disclaimer in the
14b6cbf720SGianluca Guida *    documentation and/or other materials provided with the distribution.
15b6cbf720SGianluca Guida *
16b6cbf720SGianluca Guida * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17b6cbf720SGianluca Guida * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18b6cbf720SGianluca Guida * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19b6cbf720SGianluca Guida * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20b6cbf720SGianluca Guida * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21b6cbf720SGianluca Guida * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22b6cbf720SGianluca Guida * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23b6cbf720SGianluca Guida * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24b6cbf720SGianluca Guida * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25b6cbf720SGianluca Guida * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26b6cbf720SGianluca Guida * POSSIBILITY OF SUCH DAMAGE.
27b6cbf720SGianluca Guida */
28b6cbf720SGianluca Guida
29b6cbf720SGianluca Guida#include <machine/asm.h>
30b6cbf720SGianluca Guida#include "atomic_op_asm.h"
31b6cbf720SGianluca Guida
32b6cbf720SGianluca Guida	.text
33b6cbf720SGianluca Guida	.set	noreorder
34*f14fb602SLionel Sambuc#ifdef _KERNEL_OPT
35*f14fb602SLionel Sambuc#include "opt_cputype.h"
36*f14fb602SLionel Sambuc#ifndef MIPS3_LOONGSON2F
37*f14fb602SLionel Sambuc	.set	noat
38b6cbf720SGianluca Guida	.set	nomacro
39*f14fb602SLionel Sambuc#endif
40*f14fb602SLionel Sambuc#else /* _KERNEL_OPT */
41*f14fb602SLionel Sambuc	.set	noat
42*f14fb602SLionel Sambuc	.set	nomacro
43*f14fb602SLionel Sambuc#endif /* _KERNEL_OPT */
44b6cbf720SGianluca Guida
45b6cbf720SGianluca GuidaLEAF(_atomic_or_32)
46b6cbf720SGianluca Guida1:	INT_LL		t0, 0(a0)
47b6cbf720SGianluca Guida	 nop
48b6cbf720SGianluca Guida	or		t0, a1
49b6cbf720SGianluca Guida	INT_SC		t0, 0(a0)
50b6cbf720SGianluca Guida	beq		t0, zero, 1b
51b6cbf720SGianluca Guida 	 nop
52b6cbf720SGianluca Guida	j		ra
53b6cbf720SGianluca Guida	 nop
54b6cbf720SGianluca GuidaEND(_atomic_or_32)
55b6cbf720SGianluca GuidaATOMIC_OP_ALIAS(atomic_or_32, _atomic_or_32)
56b6cbf720SGianluca Guida
57b6cbf720SGianluca GuidaLEAF(_atomic_or_32_nv)
58b6cbf720SGianluca Guida1:	INT_LL		v0, 0(a0)
59b6cbf720SGianluca Guida	 nop
60b6cbf720SGianluca Guida	or		v0, a1
61b6cbf720SGianluca Guida	move		t0, v0
62b6cbf720SGianluca Guida	INT_SC		t0, 0(a0)
63b6cbf720SGianluca Guida	beq		t0, zero, 1b
64b6cbf720SGianluca Guida 	 nop
65b6cbf720SGianluca Guida	j		ra
66b6cbf720SGianluca Guida	 nop
67b6cbf720SGianluca GuidaEND(_atomic_or_32_nv)
68b6cbf720SGianluca GuidaATOMIC_OP_ALIAS(atomic_or_32_nv, _atomic_or_32_nv)
69b6cbf720SGianluca Guida
70b6cbf720SGianluca Guida#if !defined(__mips_o32)
71b6cbf720SGianluca GuidaLEAF(_atomic_or_64)
72b6cbf720SGianluca Guida1:	REG_LL		t0, 0(a0)
73b6cbf720SGianluca Guida	 nop
74b6cbf720SGianluca Guida	or		t0, a1
75b6cbf720SGianluca Guida	REG_SC		t0, 0(a0)
76b6cbf720SGianluca Guida	beq		t0, zero, 1b
77b6cbf720SGianluca Guida 	 nop
78b6cbf720SGianluca Guida	j		ra
79b6cbf720SGianluca Guida	 nop
80b6cbf720SGianluca GuidaEND(_atomic_or_64)
81b6cbf720SGianluca GuidaATOMIC_OP_ALIAS(atomic_or_64, _atomic_or_64)
82b6cbf720SGianluca Guida
83b6cbf720SGianluca GuidaLEAF(_atomic_or_64_nv)
84b6cbf720SGianluca Guida1:	REG_LL		v0, 0(a0)
85b6cbf720SGianluca Guida	 nop
86b6cbf720SGianluca Guida	or		v0, a1
87b6cbf720SGianluca Guida	move		t0, v0
88b6cbf720SGianluca Guida	REG_SC		t0, 0(a0)
89b6cbf720SGianluca Guida	beq		t0, zero, 1b
90b6cbf720SGianluca Guida 	 nop
91b6cbf720SGianluca Guida	j		ra
92b6cbf720SGianluca Guida	 nop
93b6cbf720SGianluca GuidaEND(_atomic_or_64_nv)
94b6cbf720SGianluca GuidaATOMIC_OP_ALIAS(atomic_or_64_nv, _atomic_or_64_nv)
95b6cbf720SGianluca Guida#endif
96b6cbf720SGianluca Guida
97b6cbf720SGianluca Guida#ifdef _LP64
98b6cbf720SGianluca GuidaSTRONG_ALIAS(_atomic_or_ulong,		_atomic_or_64)
99b6cbf720SGianluca GuidaSTRONG_ALIAS(_atomic_or_ulong_nv,	_atomic_or_64_nv)
100b6cbf720SGianluca Guida#else
101b6cbf720SGianluca GuidaSTRONG_ALIAS(_atomic_or_ulong,		_atomic_or_32)
102b6cbf720SGianluca GuidaSTRONG_ALIAS(_atomic_or_ulong_nv,	_atomic_or_32_nv)
103b6cbf720SGianluca Guida#endif
104b6cbf720SGianluca GuidaSTRONG_ALIAS(_atomic_or_uint,		_atomic_or_32)
105b6cbf720SGianluca GuidaSTRONG_ALIAS(_atomic_or_uint_nv,	_atomic_or_32_nv)
106b6cbf720SGianluca Guida
107b6cbf720SGianluca GuidaATOMIC_OP_ALIAS(atomic_or_uint,		_atomic_or_uint)
108b6cbf720SGianluca GuidaATOMIC_OP_ALIAS(atomic_or_uint_nv,	_atomic_or_uint_nv)
109b6cbf720SGianluca GuidaATOMIC_OP_ALIAS(atomic_or_ulong,	_atomic_or_ulong)
110b6cbf720SGianluca GuidaATOMIC_OP_ALIAS(atomic_or_ulong_nv,	_atomic_or_ulong_nv)
111