17d0426ddSRiver Riddle //===- StdExpandDivs.cpp - Code to prepare Std for lowering Divs to LLVM -===// 27d0426ddSRiver Riddle // 37d0426ddSRiver Riddle // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 47d0426ddSRiver Riddle // See https://llvm.org/LICENSE.txt for license information. 57d0426ddSRiver Riddle // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 67d0426ddSRiver Riddle // 77d0426ddSRiver Riddle //===----------------------------------------------------------------------===// 87d0426ddSRiver Riddle // 97d0426ddSRiver Riddle // This file Std transformations to expand Divs operation to help for the 107d0426ddSRiver Riddle // lowering to LLVM. Currently implemented transformations are Ceil and Floor 117d0426ddSRiver Riddle // for Signed Integers. 127d0426ddSRiver Riddle // 137d0426ddSRiver Riddle //===----------------------------------------------------------------------===// 147d0426ddSRiver Riddle 1567d0d7acSMichele Scuttari #include "mlir/Dialect/MemRef/Transforms/Passes.h" 167d0426ddSRiver Riddle 17abc362a1SJakub Kuderski #include "mlir/Dialect/Arith/IR/Arith.h" 18abc362a1SJakub Kuderski #include "mlir/Dialect/Arith/Transforms/Passes.h" 197d0426ddSRiver Riddle #include "mlir/Dialect/MemRef/IR/MemRef.h" 20faafd26cSQuentin Colombet #include "mlir/Dialect/MemRef/Transforms/Transforms.h" 217d0426ddSRiver Riddle #include "mlir/IR/TypeUtilities.h" 227d0426ddSRiver Riddle #include "mlir/Transforms/DialectConversion.h" 2301e80a0fSDaniil Dudkin #include "llvm/ADT/STLExtras.h" 247d0426ddSRiver Riddle 2567d0d7acSMichele Scuttari namespace mlir { 2667d0d7acSMichele Scuttari namespace memref { 2767d0d7acSMichele Scuttari #define GEN_PASS_DEF_EXPANDOPS 2867d0d7acSMichele Scuttari #include "mlir/Dialect/MemRef/Transforms/Passes.h.inc" 2967d0d7acSMichele Scuttari } // namespace memref 3067d0d7acSMichele Scuttari } // namespace mlir 3167d0d7acSMichele Scuttari 327d0426ddSRiver Riddle using namespace mlir; 337d0426ddSRiver Riddle 347d0426ddSRiver Riddle namespace { 357d0426ddSRiver Riddle 367d0426ddSRiver Riddle /// Converts `atomic_rmw` that cannot be lowered to a simple atomic op with 376f4a5286SDaniil Dudkin /// AtomicRMWOpLowering pattern, such as minimum and maximum operations for 386f4a5286SDaniil Dudkin /// floating-point numbers, to `memref.generic_atomic_rmw` with the expanded 396f4a5286SDaniil Dudkin /// code. 407d0426ddSRiver Riddle /// 416f4a5286SDaniil Dudkin /// %x = atomic_rmw maximumf %fval, %F[%i] : (f32, memref<10xf32>) -> f32 427d0426ddSRiver Riddle /// 437d0426ddSRiver Riddle /// will be lowered to 447d0426ddSRiver Riddle /// 457d0426ddSRiver Riddle /// %x = memref.generic_atomic_rmw %F[%i] : memref<10xf32> { 467d0426ddSRiver Riddle /// ^bb0(%current: f32): 476f4a5286SDaniil Dudkin /// %1 = arith.maximumf %current, %fval : f32 486f4a5286SDaniil Dudkin /// memref.atomic_yield %1 : f32 497d0426ddSRiver Riddle /// } 507d0426ddSRiver Riddle struct AtomicRMWOpConverter : public OpRewritePattern<memref::AtomicRMWOp> { 517d0426ddSRiver Riddle public: 527d0426ddSRiver Riddle using OpRewritePattern::OpRewritePattern; 537d0426ddSRiver Riddle 547d0426ddSRiver Riddle LogicalResult matchAndRewrite(memref::AtomicRMWOp op, 557d0426ddSRiver Riddle PatternRewriter &rewriter) const final { 567d0426ddSRiver Riddle auto loc = op.getLoc(); 577d0426ddSRiver Riddle auto genericOp = rewriter.create<memref::GenericAtomicRMWOp>( 58136d746eSJacques Pienaar loc, op.getMemref(), op.getIndices()); 597d0426ddSRiver Riddle OpBuilder bodyBuilder = 607d0426ddSRiver Riddle OpBuilder::atBlockEnd(genericOp.getBody(), rewriter.getListener()); 617d0426ddSRiver Riddle 627d0426ddSRiver Riddle Value lhs = genericOp.getCurrentValue(); 63136d746eSJacques Pienaar Value rhs = op.getValue(); 646f4a5286SDaniil Dudkin 656f4a5286SDaniil Dudkin Value arithOp = 666f4a5286SDaniil Dudkin mlir::arith::getReductionOp(op.getKind(), bodyBuilder, loc, lhs, rhs); 676f4a5286SDaniil Dudkin bodyBuilder.create<memref::AtomicYieldOp>(loc, arithOp); 687d0426ddSRiver Riddle 697d0426ddSRiver Riddle rewriter.replaceOp(op, genericOp.getResult()); 707d0426ddSRiver Riddle return success(); 717d0426ddSRiver Riddle } 727d0426ddSRiver Riddle }; 737d0426ddSRiver Riddle 747d0426ddSRiver Riddle /// Converts `memref.reshape` that has a target shape of a statically-known 757d0426ddSRiver Riddle /// size to `memref.reinterpret_cast`. 767d0426ddSRiver Riddle struct MemRefReshapeOpConverter : public OpRewritePattern<memref::ReshapeOp> { 777d0426ddSRiver Riddle public: 787d0426ddSRiver Riddle using OpRewritePattern::OpRewritePattern; 797d0426ddSRiver Riddle 807d0426ddSRiver Riddle LogicalResult matchAndRewrite(memref::ReshapeOp op, 817d0426ddSRiver Riddle PatternRewriter &rewriter) const final { 825550c821STres Popp auto shapeType = cast<MemRefType>(op.getShape().getType()); 837d0426ddSRiver Riddle if (!shapeType.hasStaticShape()) 847d0426ddSRiver Riddle return failure(); 857d0426ddSRiver Riddle 865550c821STres Popp int64_t rank = cast<MemRefType>(shapeType).getDimSize(0); 877d0426ddSRiver Riddle SmallVector<OpFoldResult, 4> sizes, strides; 887d0426ddSRiver Riddle sizes.resize(rank); 897d0426ddSRiver Riddle strides.resize(rank); 907d0426ddSRiver Riddle 917d0426ddSRiver Riddle Location loc = op.getLoc(); 92*889b67c9Sdonald chen Value stride = nullptr; 93*889b67c9Sdonald chen int64_t staticStride = 1; 947d0426ddSRiver Riddle for (int i = rank - 1; i >= 0; --i) { 957d0426ddSRiver Riddle Value size; 967d0426ddSRiver Riddle // Load dynamic sizes from the shape input, use constants for static dims. 977d0426ddSRiver Riddle if (op.getType().isDynamicDim(i)) { 987d0426ddSRiver Riddle Value index = rewriter.create<arith::ConstantIndexOp>(loc, i); 99136d746eSJacques Pienaar size = rewriter.create<memref::LoadOp>(loc, op.getShape(), index); 1005550c821STres Popp if (!isa<IndexType>(size.getType())) 1013c69bc4dSRiver Riddle size = rewriter.create<arith::IndexCastOp>( 1023c69bc4dSRiver Riddle loc, rewriter.getIndexType(), size); 1037d0426ddSRiver Riddle sizes[i] = size; 1047d0426ddSRiver Riddle } else { 1056089d612SRahul Kayaith auto sizeAttr = rewriter.getIndexAttr(op.getType().getDimSize(i)); 1066089d612SRahul Kayaith size = rewriter.create<arith::ConstantOp>(loc, sizeAttr); 1076089d612SRahul Kayaith sizes[i] = sizeAttr; 1087d0426ddSRiver Riddle } 109*889b67c9Sdonald chen if (stride) 1107d0426ddSRiver Riddle strides[i] = stride; 111*889b67c9Sdonald chen else 112*889b67c9Sdonald chen strides[i] = rewriter.getIndexAttr(staticStride); 113*889b67c9Sdonald chen 114*889b67c9Sdonald chen if (i > 0) { 115*889b67c9Sdonald chen if (stride) { 1167d0426ddSRiver Riddle stride = rewriter.create<arith::MulIOp>(loc, stride, size); 117*889b67c9Sdonald chen } else if (op.getType().isDynamicDim(i)) { 118*889b67c9Sdonald chen stride = rewriter.create<arith::MulIOp>( 119*889b67c9Sdonald chen loc, rewriter.create<arith::ConstantIndexOp>(loc, staticStride), 120*889b67c9Sdonald chen size); 121*889b67c9Sdonald chen } else { 122*889b67c9Sdonald chen staticStride *= op.getType().getDimSize(i); 123*889b67c9Sdonald chen } 124*889b67c9Sdonald chen } 1257d0426ddSRiver Riddle } 1267d0426ddSRiver Riddle rewriter.replaceOpWithNewOp<memref::ReinterpretCastOp>( 127136d746eSJacques Pienaar op, op.getType(), op.getSource(), /*offset=*/rewriter.getIndexAttr(0), 1287d0426ddSRiver Riddle sizes, strides); 1297d0426ddSRiver Riddle return success(); 1307d0426ddSRiver Riddle } 1317d0426ddSRiver Riddle }; 1327d0426ddSRiver Riddle 13367d0d7acSMichele Scuttari struct ExpandOpsPass : public memref::impl::ExpandOpsBase<ExpandOpsPass> { 1347d0426ddSRiver Riddle void runOnOperation() override { 1357d0426ddSRiver Riddle MLIRContext &ctx = getContext(); 1367d0426ddSRiver Riddle 1377d0426ddSRiver Riddle RewritePatternSet patterns(&ctx); 1387d0426ddSRiver Riddle memref::populateExpandOpsPatterns(patterns); 1397d0426ddSRiver Riddle ConversionTarget target(ctx); 1407d0426ddSRiver Riddle 141abc362a1SJakub Kuderski target.addLegalDialect<arith::ArithDialect, memref::MemRefDialect>(); 1427d0426ddSRiver Riddle target.addDynamicallyLegalOp<memref::AtomicRMWOp>( 1437d0426ddSRiver Riddle [](memref::AtomicRMWOp op) { 14401e80a0fSDaniil Dudkin constexpr std::array shouldBeExpandedKinds = { 14501e80a0fSDaniil Dudkin arith::AtomicRMWKind::maximumf, arith::AtomicRMWKind::minimumf, 14601e80a0fSDaniil Dudkin arith::AtomicRMWKind::minnumf, arith::AtomicRMWKind::maxnumf}; 14701e80a0fSDaniil Dudkin return !llvm::is_contained(shouldBeExpandedKinds, op.getKind()); 1487d0426ddSRiver Riddle }); 1497d0426ddSRiver Riddle target.addDynamicallyLegalOp<memref::ReshapeOp>([](memref::ReshapeOp op) { 1505550c821STres Popp return !cast<MemRefType>(op.getShape().getType()).hasStaticShape(); 1517d0426ddSRiver Riddle }); 1527d0426ddSRiver Riddle if (failed(applyPartialConversion(getOperation(), target, 1537d0426ddSRiver Riddle std::move(patterns)))) 1547d0426ddSRiver Riddle signalPassFailure(); 1557d0426ddSRiver Riddle } 1567d0426ddSRiver Riddle }; 1577d0426ddSRiver Riddle 1587d0426ddSRiver Riddle } // namespace 1597d0426ddSRiver Riddle 1607d0426ddSRiver Riddle void mlir::memref::populateExpandOpsPatterns(RewritePatternSet &patterns) { 1617d0426ddSRiver Riddle patterns.add<AtomicRMWOpConverter, MemRefReshapeOpConverter>( 1627d0426ddSRiver Riddle patterns.getContext()); 1637d0426ddSRiver Riddle } 1647d0426ddSRiver Riddle 1657d0426ddSRiver Riddle std::unique_ptr<Pass> mlir::memref::createExpandOpsPass() { 1667d0426ddSRiver Riddle return std::make_unique<ExpandOpsPass>(); 1677d0426ddSRiver Riddle } 168