1b8737614SUday Bondhugula //===- LoopTiling.cpp --- Loop tiling pass ------------------------------*-===// 2b8737614SUday Bondhugula // 3b8737614SUday Bondhugula // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4b8737614SUday Bondhugula // See https://llvm.org/LICENSE.txt for license information. 5b8737614SUday Bondhugula // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6b8737614SUday Bondhugula // 7b8737614SUday Bondhugula //===----------------------------------------------------------------------===// 8b8737614SUday Bondhugula // 9b8737614SUday Bondhugula // This file implements a pass to tile loop nests. 10b8737614SUday Bondhugula // 11b8737614SUday Bondhugula //===----------------------------------------------------------------------===// 12b8737614SUday Bondhugula 1367d0d7acSMichele Scuttari #include "mlir/Dialect/Affine/Passes.h" 1467d0d7acSMichele Scuttari 15755dc07dSRiver Riddle #include "mlir/Dialect/Affine/Analysis/AffineAnalysis.h" 16755dc07dSRiver Riddle #include "mlir/Dialect/Affine/Analysis/AffineStructures.h" 17755dc07dSRiver Riddle #include "mlir/Dialect/Affine/Analysis/LoopAnalysis.h" 18755dc07dSRiver Riddle #include "mlir/Dialect/Affine/Analysis/Utils.h" 19b8737614SUday Bondhugula #include "mlir/Dialect/Affine/IR/AffineOps.h" 2043a95a54SUday Bondhugula #include "mlir/Dialect/Affine/IR/AffineValueMap.h" 21a70aa7bbSRiver Riddle #include "mlir/Dialect/Affine/LoopUtils.h" 22a70aa7bbSRiver Riddle #include "mlir/Dialect/Affine/Utils.h" 2367d0d7acSMichele Scuttari #include "mlir/Dialect/Func/IR/FuncOps.h" 24b8737614SUday Bondhugula #include "mlir/IR/Builders.h" 254d67b278SJeff Niu #include "mlir/IR/IRMapping.h" 26b8737614SUday Bondhugula #include "llvm/Support/CommandLine.h" 27b8737614SUday Bondhugula #include "llvm/Support/Debug.h" 28a1fe1f5fSKazu Hirata #include <optional> 2967d0d7acSMichele Scuttari 3067d0d7acSMichele Scuttari namespace mlir { 314c48f016SMatthias Springer namespace affine { 3267d0d7acSMichele Scuttari #define GEN_PASS_DEF_AFFINELOOPTILING 3367d0d7acSMichele Scuttari #include "mlir/Dialect/Affine/Passes.h.inc" 344c48f016SMatthias Springer } // namespace affine 3567d0d7acSMichele Scuttari } // namespace mlir 3667d0d7acSMichele Scuttari 37039b969bSMichele Scuttari using namespace mlir; 384c48f016SMatthias Springer using namespace mlir::affine; 39b8737614SUday Bondhugula 40b8737614SUday Bondhugula #define DEBUG_TYPE "affine-loop-tile" 41b8737614SUday Bondhugula 42b8737614SUday Bondhugula namespace { 43b8737614SUday Bondhugula 44b8737614SUday Bondhugula /// A pass to perform loop tiling on all suitable loop nests of a Function. 454c48f016SMatthias Springer struct LoopTiling : public affine::impl::AffineLoopTilingBase<LoopTiling> { 46400ad6f9SRiver Riddle LoopTiling() = default; 47400ad6f9SRiver Riddle explicit LoopTiling(uint64_t cacheSizeBytes, bool avoidMaxMinBounds = true) 48400ad6f9SRiver Riddle : avoidMaxMinBounds(avoidMaxMinBounds) { 49400ad6f9SRiver Riddle this->cacheSizeInKiB = cacheSizeBytes / 1024; 50400ad6f9SRiver Riddle } 51b8737614SUday Bondhugula 5241574554SRiver Riddle void runOnOperation() override; 53b8737614SUday Bondhugula void getTileSizes(ArrayRef<AffineForOp> band, 54b8737614SUday Bondhugula SmallVectorImpl<unsigned> *tileSizes); 55b8737614SUday Bondhugula 56b8737614SUday Bondhugula // Default tile size if nothing is provided. 57b8737614SUday Bondhugula constexpr static unsigned kDefaultTileSize = 4; 58b8737614SUday Bondhugula 59b8737614SUday Bondhugula // If true, tile sizes are set to avoid max/min in bounds if possible. 60400ad6f9SRiver Riddle bool avoidMaxMinBounds = true; 61b8737614SUday Bondhugula }; 62b8737614SUday Bondhugula 63be0a7e9fSMehdi Amini } // namespace 64b8737614SUday Bondhugula 65b8737614SUday Bondhugula /// Creates a pass to perform loop tiling on all suitable loop nests of a 66b8737614SUday Bondhugula /// Function. 6758ceae95SRiver Riddle std::unique_ptr<OperationPass<func::FuncOp>> 684c48f016SMatthias Springer mlir::affine::createLoopTilingPass(uint64_t cacheSizeBytes) { 69b8737614SUday Bondhugula return std::make_unique<LoopTiling>(cacheSizeBytes); 70b8737614SUday Bondhugula } 714c48f016SMatthias Springer std::unique_ptr<OperationPass<func::FuncOp>> 724c48f016SMatthias Springer mlir::affine::createLoopTilingPass() { 73e3d834a5SRiver Riddle return std::make_unique<LoopTiling>(); 74e3d834a5SRiver Riddle } 75b8737614SUday Bondhugula 76ecddafd8SUday Bondhugula /// Reduces each tile size to the largest divisor of the corresponding trip 77ecddafd8SUday Bondhugula /// count (if the trip count is known). 78b8737614SUday Bondhugula static void adjustToDivisorsOfTripCounts(ArrayRef<AffineForOp> band, 79b8737614SUday Bondhugula SmallVectorImpl<unsigned> *tileSizes) { 80b8737614SUday Bondhugula assert(band.size() == tileSizes->size() && "invalid tile size count"); 81b8737614SUday Bondhugula for (unsigned i = 0, e = band.size(); i < e; i++) { 82b8737614SUday Bondhugula unsigned &tSizeAdjusted = (*tileSizes)[i]; 830a81ace0SKazu Hirata std::optional<uint64_t> mayConst = getConstantTripCount(band[i]); 84ecddafd8SUday Bondhugula if (!mayConst) 85b8737614SUday Bondhugula continue; 86b8737614SUday Bondhugula // Adjust the tile size to largest factor of the trip count less than 87b8737614SUday Bondhugula // tSize. 886d5fc1e3SKazu Hirata uint64_t constTripCount = *mayConst; 89b8737614SUday Bondhugula if (constTripCount > 1 && tSizeAdjusted > constTripCount / 2) 90b8737614SUday Bondhugula tSizeAdjusted = constTripCount / 2; 91b8737614SUday Bondhugula while (constTripCount % tSizeAdjusted != 0) 92b8737614SUday Bondhugula tSizeAdjusted--; 93b8737614SUday Bondhugula } 94b8737614SUday Bondhugula } 95b8737614SUday Bondhugula 96b8737614SUday Bondhugula // Returns tile sizes to use. Checks CL options; if none are specified, sets it 97b8737614SUday Bondhugula // based on a simple model that looks at the memory footprint and determines 98b8737614SUday Bondhugula // tile sizes assuming identity accesses / 1:1 tile size proportional footprint 99b8737614SUday Bondhugula // along each of the dimensions being tiled. 1009db53a18SRiver Riddle // TODO: evolve this model. Tile size determination is a large area 101b8737614SUday Bondhugula // to play with in general. 102b8737614SUday Bondhugula void LoopTiling::getTileSizes(ArrayRef<AffineForOp> band, 103b8737614SUday Bondhugula SmallVectorImpl<unsigned> *tileSizes) { 104b8737614SUday Bondhugula if (band.empty()) 105b8737614SUday Bondhugula return; 106b8737614SUday Bondhugula 107ecddafd8SUday Bondhugula // Use command-line tileSize for all loops if specified. 108ecddafd8SUday Bondhugula if (tileSize) { 109400ad6f9SRiver Riddle tileSizes->assign(band.size(), tileSize); 110400ad6f9SRiver Riddle return; 111400ad6f9SRiver Riddle } 112400ad6f9SRiver Riddle 113400ad6f9SRiver Riddle // Use tileSizes and fill them with default tile size if it's short. 114400ad6f9SRiver Riddle if (!this->tileSizes.empty()) { 115400ad6f9SRiver Riddle tileSizes->assign(this->tileSizes.begin(), this->tileSizes.end()); 116400ad6f9SRiver Riddle tileSizes->resize(band.size(), kDefaultTileSize); 117400ad6f9SRiver Riddle return; 118400ad6f9SRiver Riddle } 119b8737614SUday Bondhugula tileSizes->resize(band.size()); 120b8737614SUday Bondhugula 121b8737614SUday Bondhugula // The first loop in the band. 1220602e8f7SNavdeep Kumar AffineForOp rootForOp = band[0]; 123b8737614SUday Bondhugula (void)rootForOp; 124b8737614SUday Bondhugula 125b8737614SUday Bondhugula // Obtain memory footprint and set tile sizes so that a tile fits in 126b8737614SUday Bondhugula // the cache size. This is an approximation with the assumption that the 127b8737614SUday Bondhugula // footprint increases with the tile size linearly in that dimension (i.e., 128b8737614SUday Bondhugula // assumes one-to-one access function). 1290a81ace0SKazu Hirata std::optional<int64_t> fp = getMemoryFootprintBytes(band[0], 0); 130ecddafd8SUday Bondhugula if (!fp) { 131b8737614SUday Bondhugula // Fill with default tile sizes if footprint is unknown. 132b8737614SUday Bondhugula std::fill(tileSizes->begin(), tileSizes->end(), 133b8737614SUday Bondhugula LoopTiling::kDefaultTileSize); 134b8737614SUday Bondhugula if (avoidMaxMinBounds) 135b8737614SUday Bondhugula adjustToDivisorsOfTripCounts(band, tileSizes); 136b8737614SUday Bondhugula LLVM_DEBUG( 137b8737614SUday Bondhugula rootForOp.emitWarning("memory footprint unknown: using default tile " 138b8737614SUday Bondhugula "sizes adjusted to trip count divisors")); 139b8737614SUday Bondhugula return; 140b8737614SUday Bondhugula } 141b8737614SUday Bondhugula 142b8737614SUday Bondhugula // Check how many times larger the cache size is when compared to footprint. 143400ad6f9SRiver Riddle uint64_t cacheSizeBytes = cacheSizeInKiB * 1024; 1446d5fc1e3SKazu Hirata uint64_t excessFactor = llvm::divideCeil(*fp, cacheSizeBytes); 145b8737614SUday Bondhugula if (excessFactor <= 1) { 146b8737614SUday Bondhugula // No need of any tiling - set tile size to 1. 147b8737614SUday Bondhugula std::fill(tileSizes->begin(), tileSizes->end(), 1); 148b8737614SUday Bondhugula return; 149b8737614SUday Bondhugula } 150b8737614SUday Bondhugula 151b8737614SUday Bondhugula // Divide all loops equally in an attempt to reduce footprint. 1529db53a18SRiver Riddle // TODO: this is approximate. Ideally, obtain reuse factor / 153b8737614SUday Bondhugula // profitability along each dimension and weight tile sizes based on that as 154b8737614SUday Bondhugula // one possible approach. Or compute a polynomial in tile sizes and solve for 155b8737614SUday Bondhugula // it. 156b8737614SUday Bondhugula 157ecddafd8SUday Bondhugula // For an n-d tileable band, compute the n^th root of the excess. 158b8737614SUday Bondhugula unsigned tSize = 159b8737614SUday Bondhugula static_cast<unsigned>(floorl(std::pow(excessFactor, 1.0 / band.size()))); 160b8737614SUday Bondhugula // We'll keep a running product to determine the last tile size better. 161b8737614SUday Bondhugula unsigned cumulProductOfTileSizes = 1; 162b8737614SUday Bondhugula for (unsigned i = 0, e = band.size(); i < e; i++) { 163b8737614SUday Bondhugula if (i < e - 1) 164b8737614SUday Bondhugula (*tileSizes)[i] = tSize; 165b8737614SUday Bondhugula else 166b8737614SUday Bondhugula // Set last tile size to cover the balance. 167b8737614SUday Bondhugula (*tileSizes)[i] = std::max( 168b8737614SUday Bondhugula 1U, static_cast<unsigned>(excessFactor / cumulProductOfTileSizes)); 169b8737614SUday Bondhugula cumulProductOfTileSizes *= (*tileSizes)[i]; 170b8737614SUday Bondhugula } 171b8737614SUday Bondhugula if (avoidMaxMinBounds) 172b8737614SUday Bondhugula adjustToDivisorsOfTripCounts(band, tileSizes); 173b8737614SUday Bondhugula } 174b8737614SUday Bondhugula 17541574554SRiver Riddle void LoopTiling::runOnOperation() { 176b8737614SUday Bondhugula // Bands of loops to tile. 177b8737614SUday Bondhugula std::vector<SmallVector<AffineForOp, 6>> bands; 17841574554SRiver Riddle getTileableBands(getOperation(), &bands); 179b8737614SUday Bondhugula 18078e61496SUday Bondhugula // Tile each band. 181b8737614SUday Bondhugula for (auto &band : bands) { 182*fe04aafeSUday Bondhugula if (!isTilingValid(band)) { 183*fe04aafeSUday Bondhugula band.front().emitRemark("tiling nest is invalid due to dependences"); 184c3613f39SUday Bondhugula continue; 185c3613f39SUday Bondhugula } 186c3613f39SUday Bondhugula 187b8737614SUday Bondhugula // Set up tile sizes; fill missing tile sizes at the end with default tile 188400ad6f9SRiver Riddle // size or tileSize if one was provided. 189b8737614SUday Bondhugula SmallVector<unsigned, 6> tileSizes; 190b8737614SUday Bondhugula getTileSizes(band, &tileSizes); 191b8737614SUday Bondhugula if (llvm::DebugFlag) { 192b8737614SUday Bondhugula auto diag = band[0].emitRemark("using tile sizes ["); 1930602e8f7SNavdeep Kumar for (unsigned tSize : tileSizes) 19478e61496SUday Bondhugula diag << tSize << ' '; 195b8737614SUday Bondhugula diag << "]\n"; 196b8737614SUday Bondhugula } 19743a95a54SUday Bondhugula SmallVector<AffineForOp, 6> tiledNest; 1989cf9ed94SUday Bondhugula if (failed(tilePerfectlyNested(band, tileSizes, &tiledNest))) { 1999cf9ed94SUday Bondhugula // An empty band always succeeds. 2009cf9ed94SUday Bondhugula assert(!band.empty() && "guaranteed to succeed on empty bands"); 2019cf9ed94SUday Bondhugula LLVM_DEBUG(band.front()->emitRemark("loop tiling failed!\n")); 2029cf9ed94SUday Bondhugula continue; 2039cf9ed94SUday Bondhugula } 20443a95a54SUday Bondhugula 20543a95a54SUday Bondhugula // Separate full and partial tiles. 206400ad6f9SRiver Riddle if (separate) { 20743a95a54SUday Bondhugula auto intraTileLoops = 20843a95a54SUday Bondhugula MutableArrayRef<AffineForOp>(tiledNest).drop_front(band.size()); 2099cf9ed94SUday Bondhugula if (failed(separateFullTiles(intraTileLoops))) { 2109cf9ed94SUday Bondhugula assert(!intraTileLoops.empty() && 2119cf9ed94SUday Bondhugula "guaranteed to succeed on empty bands"); 2129cf9ed94SUday Bondhugula LLVM_DEBUG(intraTileLoops.front()->emitRemark( 2139cf9ed94SUday Bondhugula "separation post tiling failed!\n")); 2149cf9ed94SUday Bondhugula } 21543a95a54SUday Bondhugula } 216b8737614SUday Bondhugula } 217b8737614SUday Bondhugula } 218b8737614SUday Bondhugula 219b8737614SUday Bondhugula constexpr unsigned LoopTiling::kDefaultTileSize; 220