xref: /llvm-project/llvm/unittests/tools/llvm-mca/X86/X86TestBase.cpp (revision 97579dcc6d3cd129c75b0502f7c43a18292d44b1)
1*97579dccSMin-Yih Hsu #include "X86TestBase.h"
2*97579dccSMin-Yih Hsu #include "MCTargetDesc/X86MCTargetDesc.h"
3*97579dccSMin-Yih Hsu #include "llvm/MC/MCInstBuilder.h"
4*97579dccSMin-Yih Hsu #include "llvm/Support/TargetSelect.h"
5*97579dccSMin-Yih Hsu 
6*97579dccSMin-Yih Hsu using namespace llvm;
7*97579dccSMin-Yih Hsu using namespace mca;
8*97579dccSMin-Yih Hsu 
X86TestBase()9*97579dccSMin-Yih Hsu X86TestBase::X86TestBase() : MCATestBase("x86_64-unknown-linux", "skylake") {
10*97579dccSMin-Yih Hsu   LLVMInitializeX86TargetInfo();
11*97579dccSMin-Yih Hsu   LLVMInitializeX86TargetMC();
12*97579dccSMin-Yih Hsu   LLVMInitializeX86Target();
13*97579dccSMin-Yih Hsu   LLVMInitializeX86AsmPrinter();
14*97579dccSMin-Yih Hsu }
15*97579dccSMin-Yih Hsu 
getSimpleInsts(SmallVectorImpl<MCInst> & Insts,unsigned Repeats)16*97579dccSMin-Yih Hsu void X86TestBase::getSimpleInsts(SmallVectorImpl<MCInst> &Insts,
17*97579dccSMin-Yih Hsu                                  unsigned Repeats) {
18*97579dccSMin-Yih Hsu   for (unsigned i = 0U; i < Repeats; ++i) {
19*97579dccSMin-Yih Hsu     // vmulps  %xmm0, %xmm1, %xmm2
20*97579dccSMin-Yih Hsu     Insts.push_back(MCInstBuilder(X86::VMULPSrr)
21*97579dccSMin-Yih Hsu                         .addReg(X86::XMM2)
22*97579dccSMin-Yih Hsu                         .addReg(X86::XMM1)
23*97579dccSMin-Yih Hsu                         .addReg(X86::XMM0));
24*97579dccSMin-Yih Hsu     // vhaddps %xmm2, %xmm2, %xmm3
25*97579dccSMin-Yih Hsu     Insts.push_back(MCInstBuilder(X86::VHADDPSrr)
26*97579dccSMin-Yih Hsu                         .addReg(X86::XMM3)
27*97579dccSMin-Yih Hsu                         .addReg(X86::XMM2)
28*97579dccSMin-Yih Hsu                         .addReg(X86::XMM2));
29*97579dccSMin-Yih Hsu     // vhaddps %xmm3, %xmm3, %xmm4
30*97579dccSMin-Yih Hsu     Insts.push_back(MCInstBuilder(X86::VHADDPSrr)
31*97579dccSMin-Yih Hsu                         .addReg(X86::XMM4)
32*97579dccSMin-Yih Hsu                         .addReg(X86::XMM3)
33*97579dccSMin-Yih Hsu                         .addReg(X86::XMM3));
34*97579dccSMin-Yih Hsu   }
35*97579dccSMin-Yih Hsu }
36