xref: /llvm-project/llvm/unittests/tools/llvm-exegesis/Mips/TargetTest.cpp (revision 89b57061f7b769e9ea9bf6ed686e284f3e55affe)
1cf1ba238SSimon Atanasyan //===-- TargetTest.cpp ------------------------------------------*- C++ -*-===//
2cf1ba238SSimon Atanasyan //
3cf1ba238SSimon Atanasyan // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4cf1ba238SSimon Atanasyan // See https://llvm.org/LICENSE.txt for license information.
5cf1ba238SSimon Atanasyan // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6cf1ba238SSimon Atanasyan //
7cf1ba238SSimon Atanasyan //===----------------------------------------------------------------------===//
8cf1ba238SSimon Atanasyan 
9cf1ba238SSimon Atanasyan #include "Target.h"
10cf1ba238SSimon Atanasyan 
11cf1ba238SSimon Atanasyan #include <cassert>
12cf1ba238SSimon Atanasyan #include <memory>
13cf1ba238SSimon Atanasyan 
14cf1ba238SSimon Atanasyan #include "MCTargetDesc/MipsMCTargetDesc.h"
1531458a9fSMiloš Stojanović #include "TestBase.h"
16*89b57061SReid Kleckner #include "llvm/MC/TargetRegistry.h"
17cf1ba238SSimon Atanasyan #include "llvm/Support/TargetSelect.h"
18cf1ba238SSimon Atanasyan #include "gmock/gmock.h"
19cf1ba238SSimon Atanasyan #include "gtest/gtest.h"
20cf1ba238SSimon Atanasyan 
21cf1ba238SSimon Atanasyan namespace llvm {
22cf1ba238SSimon Atanasyan namespace exegesis {
23cf1ba238SSimon Atanasyan namespace {
24cf1ba238SSimon Atanasyan 
25cf1ba238SSimon Atanasyan using testing::AllOf;
26cf1ba238SSimon Atanasyan using testing::ElementsAre;
27cf1ba238SSimon Atanasyan using testing::Eq;
28cf1ba238SSimon Atanasyan using testing::Matcher;
29cf1ba238SSimon Atanasyan using testing::Property;
30cf1ba238SSimon Atanasyan 
IsImm(int64_t Value)31cf1ba238SSimon Atanasyan Matcher<MCOperand> IsImm(int64_t Value) {
32cf1ba238SSimon Atanasyan   return AllOf(Property(&MCOperand::isImm, Eq(true)),
33cf1ba238SSimon Atanasyan                Property(&MCOperand::getImm, Eq(Value)));
34cf1ba238SSimon Atanasyan }
35cf1ba238SSimon Atanasyan 
IsReg(unsigned Reg)36cf1ba238SSimon Atanasyan Matcher<MCOperand> IsReg(unsigned Reg) {
37cf1ba238SSimon Atanasyan   return AllOf(Property(&MCOperand::isReg, Eq(true)),
38cf1ba238SSimon Atanasyan                Property(&MCOperand::getReg, Eq(Reg)));
39cf1ba238SSimon Atanasyan }
40cf1ba238SSimon Atanasyan 
OpcodeIs(unsigned Opcode)41cf1ba238SSimon Atanasyan Matcher<MCInst> OpcodeIs(unsigned Opcode) {
42cf1ba238SSimon Atanasyan   return Property(&MCInst::getOpcode, Eq(Opcode));
43cf1ba238SSimon Atanasyan }
44cf1ba238SSimon Atanasyan 
IsLoadLow16BitImm(unsigned Reg,int64_t Value,bool IsGPR32)45804dd672SMiloš Stojanović Matcher<MCInst> IsLoadLow16BitImm(unsigned Reg, int64_t Value, bool IsGPR32) {
46804dd672SMiloš Stojanović   const unsigned ZeroReg = IsGPR32 ? Mips::ZERO : Mips::ZERO_64;
47804dd672SMiloš Stojanović   const unsigned ORi = IsGPR32 ? Mips::ORi : Mips::ORi64;
48804dd672SMiloš Stojanović   return AllOf(OpcodeIs(ORi),
49804dd672SMiloš Stojanović                ElementsAre(IsReg(Reg), IsReg(ZeroReg), IsImm(Value)));
50804dd672SMiloš Stojanović }
51804dd672SMiloš Stojanović 
IsLoadHigh16BitImm(unsigned Reg,int64_t Value,bool IsGPR32)52804dd672SMiloš Stojanović Matcher<MCInst> IsLoadHigh16BitImm(unsigned Reg, int64_t Value, bool IsGPR32) {
53804dd672SMiloš Stojanović   const unsigned LUi = IsGPR32 ? Mips::LUi : Mips::LUi64;
54804dd672SMiloš Stojanović   return AllOf(OpcodeIs(LUi), ElementsAre(IsReg(Reg), IsImm(Value)));
55804dd672SMiloš Stojanović }
56804dd672SMiloš Stojanović 
IsShift(unsigned Reg,uint16_t Amount,bool IsGPR32)57804dd672SMiloš Stojanović Matcher<MCInst> IsShift(unsigned Reg, uint16_t Amount, bool IsGPR32) {
58804dd672SMiloš Stojanović   const unsigned SLL = IsGPR32 ? Mips::SLL : Mips::SLL64_64;
59804dd672SMiloš Stojanović   return AllOf(OpcodeIs(SLL),
60804dd672SMiloš Stojanović                ElementsAre(IsReg(Reg), IsReg(Reg), IsImm(Amount)));
61cf1ba238SSimon Atanasyan }
62cf1ba238SSimon Atanasyan 
6331458a9fSMiloš Stojanović class MipsTargetTest : public MipsTestBase {
64cf1ba238SSimon Atanasyan protected:
setRegTo(unsigned Reg,const APInt & Value)65cf1ba238SSimon Atanasyan   std::vector<MCInst> setRegTo(unsigned Reg, const APInt &Value) {
66cf1ba238SSimon Atanasyan     return State.getExegesisTarget().setRegTo(State.getSubtargetInfo(), Reg,
67cf1ba238SSimon Atanasyan                                               Value);
68cf1ba238SSimon Atanasyan   }
69cf1ba238SSimon Atanasyan };
70cf1ba238SSimon Atanasyan 
TEST_F(MipsTargetTest,SetGPR32RegTo16BitValue)71804dd672SMiloš Stojanović TEST_F(MipsTargetTest, SetGPR32RegTo16BitValue) {
72cf1ba238SSimon Atanasyan   const uint16_t Value = 0xFFFFU;
73cf1ba238SSimon Atanasyan   const unsigned Reg = Mips::T0;
74cf1ba238SSimon Atanasyan   EXPECT_THAT(setRegTo(Reg, APInt(16, Value)),
75804dd672SMiloš Stojanović               ElementsAre(IsLoadLow16BitImm(Reg, Value, true)));
76804dd672SMiloš Stojanović }
77804dd672SMiloš Stojanović 
TEST_F(MipsTargetTest,SetGPR64RegTo16BitValue)78804dd672SMiloš Stojanović TEST_F(MipsTargetTest, SetGPR64RegTo16BitValue) {
79804dd672SMiloš Stojanović   const uint16_t Value = 0xFFFFU;
80804dd672SMiloš Stojanović   const unsigned Reg = Mips::T0_64;
81804dd672SMiloš Stojanović   EXPECT_THAT(setRegTo(Reg, APInt(16, Value)),
82804dd672SMiloš Stojanović               ElementsAre(IsLoadLow16BitImm(Reg, Value, false)));
83804dd672SMiloš Stojanović }
84804dd672SMiloš Stojanović 
TEST_F(MipsTargetTest,SetGPR32RegTo32BitValue)85804dd672SMiloš Stojanović TEST_F(MipsTargetTest, SetGPR32RegTo32BitValue) {
86804dd672SMiloš Stojanović   const uint32_t Value0 = 0xFFFF0000UL;
87804dd672SMiloš Stojanović   const unsigned Reg0 = Mips::T0;
88804dd672SMiloš Stojanović   EXPECT_THAT(setRegTo(Reg0, APInt(32, Value0)),
89804dd672SMiloš Stojanović               ElementsAre(IsLoadHigh16BitImm(Reg0, 0xFFFFU, true)));
90804dd672SMiloš Stojanović   const uint32_t Value1 = 0xFFFFFFFFUL;
91804dd672SMiloš Stojanović   const unsigned Reg1 = Mips::T1;
92804dd672SMiloš Stojanović   EXPECT_THAT(setRegTo(Reg1, APInt(32, Value1)),
93804dd672SMiloš Stojanović               ElementsAre(IsLoadHigh16BitImm(Reg1, 0xFFFFU, true),
94804dd672SMiloš Stojanović                           IsLoadLow16BitImm(Reg1, 0xFFFFU, true)));
95804dd672SMiloš Stojanović }
96804dd672SMiloš Stojanović 
TEST_F(MipsTargetTest,SetGPR64RegTo32BitValue)97804dd672SMiloš Stojanović TEST_F(MipsTargetTest, SetGPR64RegTo32BitValue) {
98804dd672SMiloš Stojanović   const uint32_t Value0 = 0x7FFF0000UL;
99804dd672SMiloš Stojanović   const unsigned Reg0 = Mips::T0_64;
100804dd672SMiloš Stojanović   EXPECT_THAT(setRegTo(Reg0, APInt(32, Value0)),
101804dd672SMiloš Stojanović               ElementsAre(IsLoadHigh16BitImm(Reg0, 0x7FFFU, false)));
102804dd672SMiloš Stojanović   const uint32_t Value1 = 0x7FFFFFFFUL;
103804dd672SMiloš Stojanović   const unsigned Reg1 = Mips::T1_64;
104804dd672SMiloš Stojanović   EXPECT_THAT(setRegTo(Reg1, APInt(32, Value1)),
105804dd672SMiloš Stojanović               ElementsAre(IsLoadHigh16BitImm(Reg1, 0x7FFFU, false),
106804dd672SMiloš Stojanović                           IsLoadLow16BitImm(Reg1, 0xFFFFU, false)));
107804dd672SMiloš Stojanović   const uint32_t Value2 = 0xFFFF0000UL;
108804dd672SMiloš Stojanović   const unsigned Reg2 = Mips::T2_64;
109804dd672SMiloš Stojanović   EXPECT_THAT(setRegTo(Reg2, APInt(32, Value2)),
110804dd672SMiloš Stojanović               ElementsAre(IsLoadLow16BitImm(Reg2, 0xFFFFU, false),
111804dd672SMiloš Stojanović                           IsShift(Reg2, 16, false)));
112804dd672SMiloš Stojanović   const uint32_t Value3 = 0xFFFFFFFFUL;
113804dd672SMiloš Stojanović   const unsigned Reg3 = Mips::T3_64;
114804dd672SMiloš Stojanović   EXPECT_THAT(setRegTo(Reg3, APInt(32, Value3)),
115804dd672SMiloš Stojanović               ElementsAre(IsLoadLow16BitImm(Reg3, 0xFFFFU, false),
116804dd672SMiloš Stojanović                           IsShift(Reg3, 16, false),
117804dd672SMiloš Stojanović                           IsLoadLow16BitImm(Reg3, 0xFFFFU, false)));
118cf1ba238SSimon Atanasyan }
119cf1ba238SSimon Atanasyan 
TEST_F(MipsTargetTest,DefaultPfmCounters)120cf1ba238SSimon Atanasyan TEST_F(MipsTargetTest, DefaultPfmCounters) {
121cf1ba238SSimon Atanasyan   const std::string Expected = "CYCLES";
122cf1ba238SSimon Atanasyan   EXPECT_EQ(State.getExegesisTarget().getPfmCounters("").CycleCounter,
123cf1ba238SSimon Atanasyan             Expected);
124cf1ba238SSimon Atanasyan   EXPECT_EQ(
125cf1ba238SSimon Atanasyan       State.getExegesisTarget().getPfmCounters("unknown_cpu").CycleCounter,
126cf1ba238SSimon Atanasyan       Expected);
127cf1ba238SSimon Atanasyan }
128cf1ba238SSimon Atanasyan 
129cf1ba238SSimon Atanasyan } // namespace
130cf1ba238SSimon Atanasyan } // namespace exegesis
131cf1ba238SSimon Atanasyan } // namespace llvm
132