xref: /llvm-project/llvm/test/tools/llvm-mca/X86/Znver2/resources-rdrand.s (revision 3408940f736955402b7676e3b8bab6906cc82637)
1*3408940fSGanesh Gopalasubramanian# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2*3408940fSGanesh Gopalasubramanian# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s
3*3408940fSGanesh Gopalasubramanian
4*3408940fSGanesh Gopalasubramanianrdrand   %ax
5*3408940fSGanesh Gopalasubramanianrdrand   %eax
6*3408940fSGanesh Gopalasubramanianrdrand   %rax
7*3408940fSGanesh Gopalasubramanian
8*3408940fSGanesh Gopalasubramanian# CHECK:      Instruction Info:
9*3408940fSGanesh Gopalasubramanian# CHECK-NEXT: [1]: #uOps
10*3408940fSGanesh Gopalasubramanian# CHECK-NEXT: [2]: Latency
11*3408940fSGanesh Gopalasubramanian# CHECK-NEXT: [3]: RThroughput
12*3408940fSGanesh Gopalasubramanian# CHECK-NEXT: [4]: MayLoad
13*3408940fSGanesh Gopalasubramanian# CHECK-NEXT: [5]: MayStore
14*3408940fSGanesh Gopalasubramanian# CHECK-NEXT: [6]: HasSideEffects (U)
15*3408940fSGanesh Gopalasubramanian
16*3408940fSGanesh Gopalasubramanian# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
17*3408940fSGanesh Gopalasubramanian# CHECK-NEXT:  1      100   0.25                  U     rdrandw	%ax
18*3408940fSGanesh Gopalasubramanian# CHECK-NEXT:  1      100   0.25                  U     rdrandl	%eax
19*3408940fSGanesh Gopalasubramanian# CHECK-NEXT:  1      100   0.25                  U     rdrandq	%rax
20*3408940fSGanesh Gopalasubramanian
21*3408940fSGanesh Gopalasubramanian# CHECK:      Resources:
22*3408940fSGanesh Gopalasubramanian# CHECK-NEXT: [0]   - Zn2AGU0
23*3408940fSGanesh Gopalasubramanian# CHECK-NEXT: [1]   - Zn2AGU1
24*3408940fSGanesh Gopalasubramanian# CHECK-NEXT: [2]   - Zn2AGU2
25*3408940fSGanesh Gopalasubramanian# CHECK-NEXT: [3]   - Zn2ALU0
26*3408940fSGanesh Gopalasubramanian# CHECK-NEXT: [4]   - Zn2ALU1
27*3408940fSGanesh Gopalasubramanian# CHECK-NEXT: [5]   - Zn2ALU2
28*3408940fSGanesh Gopalasubramanian# CHECK-NEXT: [6]   - Zn2ALU3
29*3408940fSGanesh Gopalasubramanian# CHECK-NEXT: [7]   - Zn2Divider
30*3408940fSGanesh Gopalasubramanian# CHECK-NEXT: [8]   - Zn2FPU0
31*3408940fSGanesh Gopalasubramanian# CHECK-NEXT: [9]   - Zn2FPU1
32*3408940fSGanesh Gopalasubramanian# CHECK-NEXT: [10]  - Zn2FPU2
33*3408940fSGanesh Gopalasubramanian# CHECK-NEXT: [11]  - Zn2FPU3
34*3408940fSGanesh Gopalasubramanian# CHECK-NEXT: [12]  - Zn2Multiplier
35*3408940fSGanesh Gopalasubramanian
36*3408940fSGanesh Gopalasubramanian# CHECK:      Resource pressure per iteration:
37*3408940fSGanesh Gopalasubramanian# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]
38*3408940fSGanesh Gopalasubramanian# CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -      -      -
39*3408940fSGanesh Gopalasubramanian
40*3408940fSGanesh Gopalasubramanian# CHECK:      Resource pressure by instruction:
41*3408940fSGanesh Gopalasubramanian# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   Instructions:
42*3408940fSGanesh Gopalasubramanian# CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -      -      -     rdrandw	%ax
43*3408940fSGanesh Gopalasubramanian# CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -      -      -     rdrandl	%eax
44*3408940fSGanesh Gopalasubramanian# CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -      -      -     rdrandq	%rax
45