190d141a2SGreg Bedwell# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2ff9c1092SAndrea Di Biagio# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -resource-pressure=false -instruction-info=true < %s | FileCheck %s --check-prefix=ENABLED 3ff9c1092SAndrea Di Biagio# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -resource-pressure=false -instruction-info=false < %s | FileCheck %s -check-prefix=DISABLED 4ff9c1092SAndrea Di Biagio# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -resource-pressure=false -instruction-info < %s | FileCheck %s -check-prefix=ENABLED 5ff9c1092SAndrea Di Biagio# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -resource-pressure=false < %s | FileCheck %s -check-prefix=ENABLED 6ff9c1092SAndrea Di Biagio 7ff9c1092SAndrea Di Biagiovmulps %xmm0, %xmm1, %xmm2 8ff9c1092SAndrea Di Biagiovhaddps %xmm2, %xmm2, %xmm3 9ff9c1092SAndrea Di Biagiovhaddps %xmm3, %xmm3, %xmm4 10ff9c1092SAndrea Di Biagio 11ff9c1092SAndrea Di Biagio# DISABLED-NOT: Instruction Info: 12ff9c1092SAndrea Di Biagio 13e790f6fbSGreg Bedwell 1490d141a2SGreg Bedwell# ENABLED: Iterations: 100 1590d141a2SGreg Bedwell# ENABLED-NEXT: Instructions: 300 16*c5f0f530SAndrea Di Biagio# ENABLED-NEXT: Total Cycles: 211 17a2eee474SAndrea Di Biagio# ENABLED-NEXT: Total uOps: 300 18a2eee474SAndrea Di Biagio 19a2eee474SAndrea Di Biagio 20a2eee474SAndrea Di Biagio# ENABLED: Dispatch Width: 2 21*c5f0f530SAndrea Di Biagio# ENABLED-NEXT: uOps Per Cycle: 1.42 22*c5f0f530SAndrea Di Biagio# ENABLED-NEXT: IPC: 1.42 233fc20c9cSAndrea Di Biagio# ENABLED-NEXT: Block RThroughput: 2.0 2490d141a2SGreg Bedwell 25ff9c1092SAndrea Di Biagio# ENABLED: Instruction Info: 26ff9c1092SAndrea Di Biagio# ENABLED-NEXT: [1]: #uOps 27ff9c1092SAndrea Di Biagio# ENABLED-NEXT: [2]: Latency 28ff9c1092SAndrea Di Biagio# ENABLED-NEXT: [3]: RThroughput 29ff9c1092SAndrea Di Biagio# ENABLED-NEXT: [4]: MayLoad 30ff9c1092SAndrea Di Biagio# ENABLED-NEXT: [5]: MayStore 31d2e2c053SAndrea Di Biagio# ENABLED-NEXT: [6]: HasSideEffects (U) 32ff9c1092SAndrea Di Biagio 33ff9c1092SAndrea Di Biagio# ENABLED: [1] [2] [3] [4] [5] [6] Instructions: 34ff9c1092SAndrea Di Biagio# ENABLED-NEXT: 1 2 1.00 vmulps %xmm0, %xmm1, %xmm2 35*c5f0f530SAndrea Di Biagio# ENABLED-NEXT: 1 4 1.00 vhaddps %xmm2, %xmm2, %xmm3 36*c5f0f530SAndrea Di Biagio# ENABLED-NEXT: 1 4 1.00 vhaddps %xmm3, %xmm3, %xmm4 37