1a5192187SRoman Lebedev# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2a5baf867SRoman Lebedev# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1500 -timeline -timeline-max-iterations=3 < %s | FileCheck %s 3a5192187SRoman Lebedev 4a5192187SRoman Lebedev# perf stat reports a throughput of 0.60 IPC for this code snippet. 5a5192187SRoman Lebedev 6a5192187SRoman Lebedev# The lzcnt cannot execute in parallel with the imul because there is a false 7a5192187SRoman Lebedev# dependency on %bx. 8a5192187SRoman Lebedev 9a5192187SRoman Lebedevimul %ax, %bx 10a5192187SRoman Lebedevlzcnt %ax, %bx 11a5192187SRoman Lebedevadd %cx, %bx 12a5192187SRoman Lebedev 13a5192187SRoman Lebedev# CHECK: Iterations: 1500 14a5192187SRoman Lebedev# CHECK-NEXT: Instructions: 4500 159db0e725SRoman Lebedev# CHECK-NEXT: Total Cycles: 9753 16a5baf867SRoman Lebedev# CHECK-NEXT: Total uOps: 6000 17a5192187SRoman Lebedev 18a5192187SRoman Lebedev# CHECK: Dispatch Width: 4 199db0e725SRoman Lebedev# CHECK-NEXT: uOps Per Cycle: 0.62 209db0e725SRoman Lebedev# CHECK-NEXT: IPC: 0.46 219db0e725SRoman Lebedev# CHECK-NEXT: Block RThroughput: 2.0 22a5192187SRoman Lebedev 23a5192187SRoman Lebedev# CHECK: Instruction Info: 24a5192187SRoman Lebedev# CHECK-NEXT: [1]: #uOps 25a5192187SRoman Lebedev# CHECK-NEXT: [2]: Latency 26a5192187SRoman Lebedev# CHECK-NEXT: [3]: RThroughput 27a5192187SRoman Lebedev# CHECK-NEXT: [4]: MayLoad 28a5192187SRoman Lebedev# CHECK-NEXT: [5]: MayStore 29a5192187SRoman Lebedev# CHECK-NEXT: [6]: HasSideEffects (U) 30a5192187SRoman Lebedev 31a5192187SRoman Lebedev# CHECK: [1] [2] [3] [4] [5] [6] Instructions: 329db0e725SRoman Lebedev# CHECK-NEXT: 1 4 2.00 imulw %ax, %bx 339db0e725SRoman Lebedev# CHECK-NEXT: 2 2 2.00 lzcntw %ax, %bx 349db0e725SRoman Lebedev# CHECK-NEXT: 1 1 1.00 addw %cx, %bx 35a5192187SRoman Lebedev 36a5192187SRoman Lebedev# CHECK: Resources: 37a5baf867SRoman Lebedev# CHECK-NEXT: [0.0] - PdAGLU01 38a5baf867SRoman Lebedev# CHECK-NEXT: [0.1] - PdAGLU01 39a5baf867SRoman Lebedev# CHECK-NEXT: [1] - PdBranch 40a5baf867SRoman Lebedev# CHECK-NEXT: [2] - PdCount 41a5baf867SRoman Lebedev# CHECK-NEXT: [3] - PdDiv 42a5baf867SRoman Lebedev# CHECK-NEXT: [4] - PdEX0 43a5baf867SRoman Lebedev# CHECK-NEXT: [5] - PdEX1 44a5baf867SRoman Lebedev# CHECK-NEXT: [6] - PdFPCVT 45a5baf867SRoman Lebedev# CHECK-NEXT: [7.0] - PdFPFMA 46a5baf867SRoman Lebedev# CHECK-NEXT: [7.1] - PdFPFMA 47a5baf867SRoman Lebedev# CHECK-NEXT: [8.0] - PdFPMAL 48a5baf867SRoman Lebedev# CHECK-NEXT: [8.1] - PdFPMAL 49a5baf867SRoman Lebedev# CHECK-NEXT: [9] - PdFPMMA 50a5baf867SRoman Lebedev# CHECK-NEXT: [10] - PdFPSTO 51a5baf867SRoman Lebedev# CHECK-NEXT: [11] - PdFPU0 52a5baf867SRoman Lebedev# CHECK-NEXT: [12] - PdFPU1 53a5baf867SRoman Lebedev# CHECK-NEXT: [13] - PdFPU2 54a5baf867SRoman Lebedev# CHECK-NEXT: [14] - PdFPU3 55a5baf867SRoman Lebedev# CHECK-NEXT: [15] - PdFPXBR 56b428b8b2SRoman Lebedev# CHECK-NEXT: [16.0] - PdLoad 57b428b8b2SRoman Lebedev# CHECK-NEXT: [16.1] - PdLoad 58b428b8b2SRoman Lebedev# CHECK-NEXT: [17] - PdMul 59b428b8b2SRoman Lebedev# CHECK-NEXT: [18] - PdStore 60a5192187SRoman Lebedev 61a5192187SRoman Lebedev# CHECK: Resource pressure per iteration: 62b428b8b2SRoman Lebedev# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18] 639db0e725SRoman Lebedev# CHECK-NEXT: - - - - - 3.00 2.00 - - - - - - - - - - - - - - 2.00 - 64a5192187SRoman Lebedev 65a5192187SRoman Lebedev# CHECK: Resource pressure by instruction: 66b428b8b2SRoman Lebedev# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18] Instructions: 679db0e725SRoman Lebedev# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - - 2.00 - imulw %ax, %bx 689db0e725SRoman Lebedev# CHECK-NEXT: - - - - - 2.00 - - - - - - - - - - - - - - - - - lzcntw %ax, %bx 699db0e725SRoman Lebedev# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - addw %cx, %bx 70a5192187SRoman Lebedev 71a5192187SRoman Lebedev# CHECK: Timeline view: 72a5baf867SRoman Lebedev# CHECK-NEXT: 0123456789 739db0e725SRoman Lebedev# CHECK-NEXT: Index 0123456789 01 74a5192187SRoman Lebedev 759db0e725SRoman Lebedev# CHECK: [0,0] DeeeeER . . .. imulw %ax, %bx 769db0e725SRoman Lebedev# CHECK-NEXT: [0,1] D===eeER . . .. lzcntw %ax, %bx 779db0e725SRoman Lebedev# CHECK-NEXT: [0,2] D=====eER . . .. addw %cx, %bx 789db0e725SRoman Lebedev# CHECK-NEXT: [1,0] .D======eeeeER . .. imulw %ax, %bx 799db0e725SRoman Lebedev# CHECK-NEXT: [1,1] .D=========eeER. .. lzcntw %ax, %bx 809db0e725SRoman Lebedev# CHECK-NEXT: [1,2] .D===========eER .. addw %cx, %bx 819db0e725SRoman Lebedev# CHECK-NEXT: [2,0] . D===========eeeeER.. imulw %ax, %bx 829db0e725SRoman Lebedev# CHECK-NEXT: [2,1] . D==============eeER. lzcntw %ax, %bx 839db0e725SRoman Lebedev# CHECK-NEXT: [2,2] . D================eER addw %cx, %bx 84a5192187SRoman Lebedev 85a5192187SRoman Lebedev# CHECK: Average Wait times (based on the timeline view): 86a5192187SRoman Lebedev# CHECK-NEXT: [0]: Executions 87a5192187SRoman Lebedev# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue 88a5192187SRoman Lebedev# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready 89a5192187SRoman Lebedev# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage 90a5192187SRoman Lebedev 91a5192187SRoman Lebedev# CHECK: [0] [1] [2] [3] 929db0e725SRoman Lebedev# CHECK-NEXT: 0. 3 6.7 0.7 0.0 imulw %ax, %bx 939db0e725SRoman Lebedev# CHECK-NEXT: 1. 3 9.7 0.0 0.0 lzcntw %ax, %bx 949db0e725SRoman Lebedev# CHECK-NEXT: 2. 3 11.7 0.0 0.0 addw %cx, %bx 95*a5e65c1cSRoman Lebedev# CHECK-NEXT: 3 9.3 0.2 0.0 <total> 96