1a5192187SRoman Lebedev# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2a5baf867SRoman Lebedev# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -resource-pressure=false -instruction-info=true < %s | FileCheck %s --check-prefix=ENABLED 3a5baf867SRoman Lebedev# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -resource-pressure=false -instruction-info=false < %s | FileCheck %s -check-prefix=DISABLED 4a5baf867SRoman Lebedev# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -resource-pressure=false -instruction-info < %s | FileCheck %s -check-prefix=ENABLED 5a5baf867SRoman Lebedev# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -resource-pressure=false < %s | FileCheck %s -check-prefix=ENABLED 6a5192187SRoman Lebedev 7a5192187SRoman Lebedevvmulps %xmm0, %xmm1, %xmm2 8a5192187SRoman Lebedevvhaddps %xmm2, %xmm2, %xmm3 9a5192187SRoman Lebedevvhaddps %xmm3, %xmm3, %xmm4 10a5192187SRoman Lebedev 11a5192187SRoman Lebedev# DISABLED-NOT: Instruction Info: 12a5192187SRoman Lebedev 13a5192187SRoman Lebedev 14a5192187SRoman Lebedev# ENABLED: Iterations: 100 15a5192187SRoman Lebedev# ENABLED-NEXT: Instructions: 300 16*9db0e725SRoman Lebedev# ENABLED-NEXT: Total Cycles: 583 17a5192187SRoman Lebedev# ENABLED-NEXT: Total uOps: 700 18a5192187SRoman Lebedev 19a5192187SRoman Lebedev 20a5192187SRoman Lebedev# ENABLED: Dispatch Width: 4 21*9db0e725SRoman Lebedev# ENABLED-NEXT: uOps Per Cycle: 1.20 22*9db0e725SRoman Lebedev# ENABLED-NEXT: IPC: 0.51 23*9db0e725SRoman Lebedev# ENABLED-NEXT: Block RThroughput: 5.5 24a5192187SRoman Lebedev 25a5192187SRoman Lebedev# ENABLED: Instruction Info: 26a5192187SRoman Lebedev# ENABLED-NEXT: [1]: #uOps 27a5192187SRoman Lebedev# ENABLED-NEXT: [2]: Latency 28a5192187SRoman Lebedev# ENABLED-NEXT: [3]: RThroughput 29a5192187SRoman Lebedev# ENABLED-NEXT: [4]: MayLoad 30a5192187SRoman Lebedev# ENABLED-NEXT: [5]: MayStore 31a5192187SRoman Lebedev# ENABLED-NEXT: [6]: HasSideEffects (U) 32a5192187SRoman Lebedev 33a5192187SRoman Lebedev# ENABLED: [1] [2] [3] [4] [5] [6] Instructions: 34a5192187SRoman Lebedev# ENABLED-NEXT: 1 5 1.00 vmulps %xmm0, %xmm1, %xmm2 35*9db0e725SRoman Lebedev# ENABLED-NEXT: 3 11 2.50 vhaddps %xmm2, %xmm2, %xmm3 36*9db0e725SRoman Lebedev# ENABLED-NEXT: 3 11 2.50 vhaddps %xmm3, %xmm3, %xmm4 37