xref: /llvm-project/llvm/test/tools/llvm-mca/AArch64/Exynos/scheduler-queue-usage.s (revision 48b7fe02a1147a734ba8b28f53b4b7ede30d0843)
190d141a2SGreg Bedwell# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
286953e43SEvandro Menezes# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -iterations=1 -scheduler-stats -resource-pressure=false -instruction-info=false < %s | FileCheck %s -check-prefixes=ALL,M3
3946fe976SEvandro Menezes# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m4 -iterations=1 -scheduler-stats -resource-pressure=false -instruction-info=false < %s | FileCheck %s -check-prefixes=ALL,M4
4*48b7fe02SEvandro Menezes# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m5 -iterations=1 -scheduler-stats -resource-pressure=false -instruction-info=false < %s | FileCheck %s -check-prefixes=ALL,M5
579487386SAndrea Di Biagio
64bfd4ce1SEvandro Menezes  b	main
779487386SAndrea Di Biagio
8e790f6fbSGreg Bedwell# ALL:      Iterations:        1
9e790f6fbSGreg Bedwell# ALL-NEXT: Instructions:      1
10e790f6fbSGreg Bedwell# ALL-NEXT: Total Cycles:      2
11a2eee474SAndrea Di Biagio# ALL-NEXT: Total uOps:        1
12e790f6fbSGreg Bedwell
13a2eee474SAndrea Di Biagio# M3:       Dispatch Width:    6
14a2eee474SAndrea Di Biagio# M3-NEXT:  uOps Per Cycle:    0.50
15a2eee474SAndrea Di Biagio# M3-NEXT:  IPC:               0.50
16e790f6fbSGreg Bedwell# M3-NEXT:  Block RThroughput: 0.2
17e790f6fbSGreg Bedwell
18946fe976SEvandro Menezes# M4:       Dispatch Width:    6
19946fe976SEvandro Menezes# M4-NEXT:  uOps Per Cycle:    0.50
20946fe976SEvandro Menezes# M4-NEXT:  IPC:               0.50
21946fe976SEvandro Menezes# M4-NEXT:  Block RThroughput: 0.2
22946fe976SEvandro Menezes
23*48b7fe02SEvandro Menezes# M5:       Dispatch Width:    6
24*48b7fe02SEvandro Menezes# M5-NEXT:  uOps Per Cycle:    0.50
25*48b7fe02SEvandro Menezes# M5-NEXT:  IPC:               0.50
26*48b7fe02SEvandro Menezes# M5-NEXT:  Block RThroughput: 0.2
27*48b7fe02SEvandro Menezes
28f6a60f1fSAndrea Di Biagio# ALL:      Schedulers - number of cycles where we saw N micro opcodes issued:
291cc29c04SAndrea Di Biagio# ALL-NEXT: [# issued], [# cycles]
301cc29c04SAndrea Di Biagio# ALL-NEXT:  0,          1  (50.0%)
311cc29c04SAndrea Di Biagio# ALL-NEXT:  1,          1  (50.0%)
321cc29c04SAndrea Di Biagio
3379487386SAndrea Di Biagio# ALL:      Scheduler's queue usage:
3479487386SAndrea Di Biagio# ALL-NEXT: No scheduler resources used.
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