1*9e261c5bSAlexey Bataev; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 2*9e261c5bSAlexey Bataev; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux -mattr=+avx2 < %s | FileCheck %s 3*9e261c5bSAlexey Bataev 4*9e261c5bSAlexey Bataevdefine void @test() { 5*9e261c5bSAlexey Bataev; CHECK-LABEL: define void @test( 6*9e261c5bSAlexey Bataev; CHECK-SAME: ) #[[ATTR0:[0-9]+]] { 7*9e261c5bSAlexey Bataev; CHECK-NEXT: [[ENTRY:.*:]] 8*9e261c5bSAlexey Bataev; CHECK-NEXT: br label %[[COND_END_I:.*]] 9*9e261c5bSAlexey Bataev; CHECK: [[COND_END_I]]: 10*9e261c5bSAlexey Bataev; CHECK-NEXT: #dbg_value(!DIArgList(i32 0, i32 undef), [[META3:![0-9]+]], !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_or, DW_OP_stack_value), [[META5:![0-9]+]]) 11*9e261c5bSAlexey Bataev; CHECK-NEXT: [[TMP0:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> zeroinitializer, <2 x i32> zeroinitializer) 12*9e261c5bSAlexey Bataev; CHECK-NEXT: [[TMP1:%.*]] = select <2 x i1> zeroinitializer, <2 x i32> zeroinitializer, <2 x i32> [[TMP0]] 13*9e261c5bSAlexey Bataev; CHECK-NEXT: [[TMP2:%.*]] = shl <2 x i32> [[TMP1]], <i32 0, i32 16> 14*9e261c5bSAlexey Bataev; CHECK-NEXT: [[TMP3:%.*]] = or <2 x i32> [[TMP2]], zeroinitializer 15*9e261c5bSAlexey Bataev; CHECK-NEXT: [[TMP4:%.*]] = or <2 x i32> [[TMP3]], zeroinitializer 16*9e261c5bSAlexey Bataev; CHECK-NEXT: [[TMP5:%.*]] = or <2 x i32> [[TMP4]], zeroinitializer 17*9e261c5bSAlexey Bataev; CHECK-NEXT: store <2 x i32> [[TMP5]], ptr null, align 4 18*9e261c5bSAlexey Bataev; CHECK-NEXT: ret void 19*9e261c5bSAlexey Bataev; 20*9e261c5bSAlexey Bataeventry: 21*9e261c5bSAlexey Bataev %arrayidx51.1.i = getelementptr i8, ptr null, i64 4 22*9e261c5bSAlexey Bataev %retval.sroa.3.0.insert.ext.i.i = zext i8 0 to i32 23*9e261c5bSAlexey Bataev %retval.sroa.2.0.insert.ext.i.i = zext i8 0 to i32 24*9e261c5bSAlexey Bataev br label %cond.end.i 25*9e261c5bSAlexey Bataev 26*9e261c5bSAlexey Bataevcond.end.i: 27*9e261c5bSAlexey Bataev %add46.i30 = or i32 0, %retval.sroa.2.0.insert.ext.i.i 28*9e261c5bSAlexey Bataev %add49.i = or i32 0, %retval.sroa.3.0.insert.ext.i.i 29*9e261c5bSAlexey Bataev #dbg_value(i32 %add49.i, !8, !DIExpression(), !16) 30*9e261c5bSAlexey Bataev %0 = tail call i32 @llvm.umin.i32(i32 %add46.i30, i32 0) 31*9e261c5bSAlexey Bataev %cmp.i14.i.i.i = icmp slt i32 %add49.i, 0 32*9e261c5bSAlexey Bataev %block_color.sroa.7.0.insert.ext.i = select i1 %cmp.i14.i.i.i, i32 0, i32 0 33*9e261c5bSAlexey Bataev %block_color.sroa.7.0.insert.shift.i = shl i32 %block_color.sroa.7.0.insert.ext.i, 16 34*9e261c5bSAlexey Bataev %block_color.sroa.5.0.insert.ext.i = select i1 false, i32 0, i32 %0 35*9e261c5bSAlexey Bataev %block_color.sroa.5.0.insert.shift.i = shl i32 %block_color.sroa.5.0.insert.ext.i, 0 36*9e261c5bSAlexey Bataev %block_color.sroa.7.0.insert.insert.i = or i32 %block_color.sroa.7.0.insert.shift.i, %block_color.sroa.5.0.insert.shift.i 37*9e261c5bSAlexey Bataev %block_color.sroa.5.0.insert.insert.i = or i32 %block_color.sroa.7.0.insert.insert.i, 0 38*9e261c5bSAlexey Bataev %block_color.sroa.0.0.insert.insert.i = or i32 %block_color.sroa.5.0.insert.insert.i, 0 39*9e261c5bSAlexey Bataev store i32 %block_color.sroa.0.0.insert.insert.i, ptr null, align 4 40*9e261c5bSAlexey Bataev %add46.1.i = or i32 0, %retval.sroa.2.0.insert.ext.i.i 41*9e261c5bSAlexey Bataev %add49.1.i = or i32 0, %retval.sroa.3.0.insert.ext.i.i 42*9e261c5bSAlexey Bataev %cmp.i11.i.i.1.i = icmp slt i32 %add46.1.i, 0 43*9e261c5bSAlexey Bataev %1 = tail call i32 @llvm.umin.i32(i32 %add49.1.i, i32 0) 44*9e261c5bSAlexey Bataev %block_color.sroa.7.0.insert.ext.1.i = select i1 false, i32 0, i32 %1 45*9e261c5bSAlexey Bataev %block_color.sroa.7.0.insert.shift.1.i = shl i32 %block_color.sroa.7.0.insert.ext.1.i, 16 46*9e261c5bSAlexey Bataev %block_color.sroa.5.0.insert.ext.1.i = select i1 %cmp.i11.i.i.1.i, i32 0, i32 0 47*9e261c5bSAlexey Bataev %block_color.sroa.5.0.insert.shift.1.i = shl i32 %block_color.sroa.5.0.insert.ext.1.i, 0 48*9e261c5bSAlexey Bataev %block_color.sroa.7.0.insert.insert.1.i = or i32 %block_color.sroa.7.0.insert.shift.1.i, %block_color.sroa.5.0.insert.shift.1.i 49*9e261c5bSAlexey Bataev %block_color.sroa.5.0.insert.insert.1.i = or i32 %block_color.sroa.7.0.insert.insert.1.i, 0 50*9e261c5bSAlexey Bataev %block_color.sroa.0.0.insert.insert.1.i = or i32 %block_color.sroa.5.0.insert.insert.1.i, 0 51*9e261c5bSAlexey Bataev store i32 %block_color.sroa.0.0.insert.insert.1.i, ptr %arrayidx51.1.i, align 4 52*9e261c5bSAlexey Bataev ret void 53*9e261c5bSAlexey Bataev} 54*9e261c5bSAlexey Bataev 55*9e261c5bSAlexey Bataev!llvm.dbg.cu = !{!0} 56*9e261c5bSAlexey Bataev!llvm.module.flags = !{!7} 57*9e261c5bSAlexey Bataev 58*9e261c5bSAlexey Bataev!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !1) 59*9e261c5bSAlexey Bataev!1 = !DIFile(filename: "q.cpp", directory: "/tmp") 60*9e261c5bSAlexey Bataev!7 = !{i32 2, !"Debug Info Version", i32 3} 61*9e261c5bSAlexey Bataev!8 = !DILocalVariable(name: "sb", arg: 4, scope: !9) 62*9e261c5bSAlexey Bataev!9 = distinct !DISubprogram(name: "color_rgba", unit: !0) 63*9e261c5bSAlexey Bataev!16 = !DILocation(scope: !9) 64*9e261c5bSAlexey Bataev;. 65*9e261c5bSAlexey Bataev; CHECK: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: [[META1:![0-9]+]], isOptimized: false, runtimeVersion: 0, emissionKind: NoDebug) 66*9e261c5bSAlexey Bataev; CHECK: [[META1]] = !DIFile(filename: "q.cpp", directory: {{.*}}) 67*9e261c5bSAlexey Bataev; CHECK: [[META3]] = !DILocalVariable(name: "sb", arg: 4, scope: [[META4:![0-9]+]]) 68*9e261c5bSAlexey Bataev; CHECK: [[META4]] = distinct !DISubprogram(name: "color_rgba", scope: null, spFlags: DISPFlagDefinition, unit: [[META0]]) 69*9e261c5bSAlexey Bataev; CHECK: [[META5]] = !DILocation(line: 0, scope: [[META4]]) 70*9e261c5bSAlexey Bataev;. 71