xref: /llvm-project/llvm/test/Transforms/SLPVectorizer/SystemZ/revec-fix-117393.ll (revision ead3a2f5980e1a713c8d4e18a4c825e1012b3701)
1*ead3a2f5SHan-Kuan Chen; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2*ead3a2f5SHan-Kuan Chen; RUN: opt -mtriple=systemz-unknown -mcpu=z15 -passes=slp-vectorizer -S -slp-revec %s | FileCheck %s
3*ead3a2f5SHan-Kuan Chen
4*ead3a2f5SHan-Kuan Chendefine void @h() {
5*ead3a2f5SHan-Kuan Chen; CHECK-LABEL: @h(
6*ead3a2f5SHan-Kuan Chen; CHECK-NEXT:  entry:
7*ead3a2f5SHan-Kuan Chen; CHECK-NEXT:    [[TMP0:%.*]] = shl <4 x i32> zeroinitializer, zeroinitializer
8*ead3a2f5SHan-Kuan Chen; CHECK-NEXT:    [[TMP1:%.*]] = or <4 x i32> [[TMP0]], zeroinitializer
9*ead3a2f5SHan-Kuan Chen; CHECK-NEXT:    [[TMP2:%.*]] = or <4 x i32> splat (i32 1), zeroinitializer
10*ead3a2f5SHan-Kuan Chen; CHECK-NEXT:    [[TMP3:%.*]] = shl <4 x i32> zeroinitializer, zeroinitializer
11*ead3a2f5SHan-Kuan Chen; CHECK-NEXT:    [[TMP4:%.*]] = or <4 x i32> [[TMP3]], zeroinitializer
12*ead3a2f5SHan-Kuan Chen; CHECK-NEXT:    [[TMP5:%.*]] = and <4 x i32> [[TMP2]], [[TMP1]]
13*ead3a2f5SHan-Kuan Chen; CHECK-NEXT:    [[TMP6:%.*]] = and <4 x i32> zeroinitializer, [[TMP5]]
14*ead3a2f5SHan-Kuan Chen; CHECK-NEXT:    [[TMP7:%.*]] = and <4 x i32> [[TMP4]], [[TMP6]]
15*ead3a2f5SHan-Kuan Chen; CHECK-NEXT:    [[TMP8:%.*]] = call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> [[TMP7]])
16*ead3a2f5SHan-Kuan Chen; CHECK-NEXT:    ret void
17*ead3a2f5SHan-Kuan Chen;
18*ead3a2f5SHan-Kuan Chenentry:
19*ead3a2f5SHan-Kuan Chen  %0 = shl <4 x i32> zeroinitializer, zeroinitializer
20*ead3a2f5SHan-Kuan Chen  %1 = or <4 x i32> %0, zeroinitializer
21*ead3a2f5SHan-Kuan Chen  %2 = or <4 x i32> splat (i32 1), zeroinitializer
22*ead3a2f5SHan-Kuan Chen  %3 = or <4 x i32> zeroinitializer, zeroinitializer
23*ead3a2f5SHan-Kuan Chen  %4 = shl <4 x i32> zeroinitializer, zeroinitializer
24*ead3a2f5SHan-Kuan Chen  %5 = or <4 x i32> %4, zeroinitializer
25*ead3a2f5SHan-Kuan Chen  %6 = and <4 x i32> %2, %1
26*ead3a2f5SHan-Kuan Chen  %7 = and <4 x i32> %3, %6
27*ead3a2f5SHan-Kuan Chen  %8 = and <4 x i32> %5, %7
28*ead3a2f5SHan-Kuan Chen  %9 = call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> %8)
29*ead3a2f5SHan-Kuan Chen  ret void
30*ead3a2f5SHan-Kuan Chen}
31