16ab59272SAlexey Bataev; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 26ab59272SAlexey Bataev; RUN: opt -S --passes=slp-vectorizer -mtriple=riscv64-unknown-linux-gnu -mattr=+v < %s | FileCheck %s 36ab59272SAlexey Bataevtarget datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128" 46ab59272SAlexey Bataevtarget triple = "riscv64-unknown-linux-gnu" 56ab59272SAlexey Bataev 66ab59272SAlexey Bataev@e = global [2 x i8] zeroinitializer 76ab59272SAlexey Bataev 86ab59272SAlexey Bataevdefine void @main(ptr noalias %p) { 96ab59272SAlexey Bataev; CHECK-LABEL: define void @main( 106ab59272SAlexey Bataev; CHECK-SAME: ptr noalias [[P:%.*]]) #[[ATTR0:[0-9]+]] { 116ab59272SAlexey Bataev; CHECK-NEXT: bb: 12*26ebe16dSAlexey Bataev; CHECK-NEXT: [[CONV_4:%.*]] = zext i32 0 to i64 13*26ebe16dSAlexey Bataev; CHECK-NEXT: [[COND_4:%.*]] = tail call i64 @llvm.smax.i64(i64 [[CONV_4]], i64 0) 14*26ebe16dSAlexey Bataev; CHECK-NEXT: [[CONV5_4:%.*]] = trunc i64 [[COND_4]] to i8 15*26ebe16dSAlexey Bataev; CHECK-NEXT: store i8 [[CONV5_4]], ptr getelementptr inbounds ([11 x i8], ptr @e, i64 0, i64 4), align 1 166ab59272SAlexey Bataev; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[P]], align 4 17*26ebe16dSAlexey Bataev; CHECK-NEXT: [[CONV_5:%.*]] = zext i32 [[TMP0]] to i64 18*26ebe16dSAlexey Bataev; CHECK-NEXT: [[COND_5:%.*]] = tail call i64 @llvm.smax.i64(i64 [[CONV_5]], i64 1) 19*26ebe16dSAlexey Bataev; CHECK-NEXT: [[CONV5_5:%.*]] = trunc i64 [[COND_5]] to i8 20*26ebe16dSAlexey Bataev; CHECK-NEXT: store i8 [[CONV5_5]], ptr getelementptr inbounds ([11 x i8], ptr @e, i64 0, i64 5), align 1 216ab59272SAlexey Bataev; CHECK-NEXT: ret void 226ab59272SAlexey Bataev; 236ab59272SAlexey Bataevbb: 246ab59272SAlexey Bataev %conv.4 = zext i32 0 to i64 256ab59272SAlexey Bataev %cond.4 = tail call i64 @llvm.smax.i64(i64 %conv.4, i64 0) 266ab59272SAlexey Bataev %conv5.4 = trunc i64 %cond.4 to i8 276ab59272SAlexey Bataev store i8 %conv5.4, ptr getelementptr inbounds ([11 x i8], ptr @e, i64 0, i64 4), align 1 286ab59272SAlexey Bataev %0 = load i32, ptr %p, align 4 296ab59272SAlexey Bataev %conv.5 = zext i32 %0 to i64 306ab59272SAlexey Bataev %cond.5 = tail call i64 @llvm.smax.i64(i64 %conv.5, i64 1) 316ab59272SAlexey Bataev %conv5.5 = trunc i64 %cond.5 to i8 326ab59272SAlexey Bataev store i8 %conv5.5, ptr getelementptr inbounds ([11 x i8], ptr @e, i64 0, i64 5), align 1 336ab59272SAlexey Bataev ret void 346ab59272SAlexey Bataev} 356ab59272SAlexey Bataev 36