1bcbdf7adSPhilip Reames; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 2bcbdf7adSPhilip Reames; RUN: opt -S --passes=slp-vectorizer -mtriple=riscv64-unknown-linux -mattr=+v < %s | FileCheck %s 3bcbdf7adSPhilip Reames 4bcbdf7adSPhilip Reamesdefine i32 @pow2_zero_constant_shift(i16 zeroext %a, i16 zeroext %b, i16 zeroext %c, i16 zeroext %d) { 5bcbdf7adSPhilip Reames; CHECK-LABEL: define i32 @pow2_zero_constant_shift( 6bcbdf7adSPhilip Reames; CHECK-SAME: i16 zeroext [[A:%.*]], i16 zeroext [[B:%.*]], i16 zeroext [[C:%.*]], i16 zeroext [[D:%.*]]) #[[ATTR0:[0-9]+]] { 7bcbdf7adSPhilip Reames; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i16> poison, i16 [[A]], i32 0 8bcbdf7adSPhilip Reames; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i16> [[TMP1]], i16 [[B]], i32 1 9bcbdf7adSPhilip Reames; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i16> [[TMP2]], i16 [[C]], i32 2 10bcbdf7adSPhilip Reames; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i16> [[TMP3]], i16 [[D]], i32 3 11*38fffa63SPaul Walker; CHECK-NEXT: [[TMP5:%.*]] = icmp eq <4 x i16> [[TMP4]], splat (i16 1) 12*38fffa63SPaul Walker; CHECK-NEXT: [[TMP6:%.*]] = select <4 x i1> [[TMP5]], <4 x i32> splat (i32 65536), <4 x i32> zeroinitializer 13bcbdf7adSPhilip Reames; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> [[TMP6]]) 14bcbdf7adSPhilip Reames; CHECK-NEXT: ret i32 [[TMP7]] 15bcbdf7adSPhilip Reames; 16bcbdf7adSPhilip Reames %t39.i0 = icmp eq i16 %a, 1 17bcbdf7adSPhilip Reames %t39.i1 = icmp eq i16 %b, 1 18bcbdf7adSPhilip Reames %t39.i2 = icmp eq i16 %c, 1 19bcbdf7adSPhilip Reames %t39.i3 = icmp eq i16 %d, 1 20bcbdf7adSPhilip Reames %t40.i0 = select i1 %t39.i0, i32 65536, i32 0 21bcbdf7adSPhilip Reames %t40.i1 = select i1 %t39.i1, i32 65536, i32 0 22bcbdf7adSPhilip Reames %t40.i2 = select i1 %t39.i2, i32 65536, i32 0 23bcbdf7adSPhilip Reames %t40.i3 = select i1 %t39.i3, i32 65536, i32 0 24bcbdf7adSPhilip Reames %or.rdx0 = or i32 %t40.i0, %t40.i1 25bcbdf7adSPhilip Reames %or.rdx1 = or i32 %t40.i2, %t40.i3 26bcbdf7adSPhilip Reames %or.rdx2 = or i32 %or.rdx0, %or.rdx1 27bcbdf7adSPhilip Reames ret i32 %or.rdx2 28bcbdf7adSPhilip Reames} 29bcbdf7adSPhilip Reames 30bcbdf7adSPhilip Reames; TODO: This case is unprofitable, and we should not be vectorizing this. 31bcbdf7adSPhilip Reamesdefine i32 @pow2_zero_variable_shift(i16 zeroext %a, i16 zeroext %b, i16 zeroext %c, i16 zeroext %d) { 32bcbdf7adSPhilip Reames; CHECK-LABEL: define i32 @pow2_zero_variable_shift( 33bcbdf7adSPhilip Reames; CHECK-SAME: i16 zeroext [[A:%.*]], i16 zeroext [[B:%.*]], i16 zeroext [[C:%.*]], i16 zeroext [[D:%.*]]) #[[ATTR0]] { 34556ec4a7SPhilip Reames; CHECK-NEXT: [[T39_I0:%.*]] = icmp eq i16 [[A]], 1 35556ec4a7SPhilip Reames; CHECK-NEXT: [[T39_I1:%.*]] = icmp eq i16 [[B]], 1 36556ec4a7SPhilip Reames; CHECK-NEXT: [[T39_I2:%.*]] = icmp eq i16 [[C]], 1 37556ec4a7SPhilip Reames; CHECK-NEXT: [[T39_I3:%.*]] = icmp eq i16 [[D]], 1 38556ec4a7SPhilip Reames; CHECK-NEXT: [[T40_I0:%.*]] = select i1 [[T39_I0]], i32 524288, i32 0 39556ec4a7SPhilip Reames; CHECK-NEXT: [[T40_I1:%.*]] = select i1 [[T39_I1]], i32 262144, i32 0 40556ec4a7SPhilip Reames; CHECK-NEXT: [[T40_I2:%.*]] = select i1 [[T39_I2]], i32 131072, i32 0 41556ec4a7SPhilip Reames; CHECK-NEXT: [[T40_I3:%.*]] = select i1 [[T39_I3]], i32 65536, i32 0 42556ec4a7SPhilip Reames; CHECK-NEXT: [[OR_RDX0:%.*]] = or i32 [[T40_I0]], [[T40_I1]] 43556ec4a7SPhilip Reames; CHECK-NEXT: [[OR_RDX1:%.*]] = or i32 [[T40_I2]], [[T40_I3]] 44556ec4a7SPhilip Reames; CHECK-NEXT: [[OR_RDX2:%.*]] = or i32 [[OR_RDX0]], [[OR_RDX1]] 45bcbdf7adSPhilip Reames; CHECK-NEXT: ret i32 [[OR_RDX2]] 46bcbdf7adSPhilip Reames; 47bcbdf7adSPhilip Reames %t39.i0 = icmp eq i16 %a, 1 48bcbdf7adSPhilip Reames %t39.i1 = icmp eq i16 %b, 1 49bcbdf7adSPhilip Reames %t39.i2 = icmp eq i16 %c, 1 50bcbdf7adSPhilip Reames %t39.i3 = icmp eq i16 %d, 1 51bcbdf7adSPhilip Reames %t40.i0 = select i1 %t39.i0, i32 524288, i32 0 52bcbdf7adSPhilip Reames %t40.i1 = select i1 %t39.i1, i32 262144, i32 0 53bcbdf7adSPhilip Reames %t40.i2 = select i1 %t39.i2, i32 131072, i32 0 54bcbdf7adSPhilip Reames %t40.i3 = select i1 %t39.i3, i32 65536, i32 0 55bcbdf7adSPhilip Reames %or.rdx0 = or i32 %t40.i0, %t40.i1 56bcbdf7adSPhilip Reames %or.rdx1 = or i32 %t40.i2, %t40.i3 57bcbdf7adSPhilip Reames %or.rdx2 = or i32 %or.rdx0, %or.rdx1 58bcbdf7adSPhilip Reames ret i32 %or.rdx2 59bcbdf7adSPhilip Reames} 60