1915439f5SZhongyunde; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2 2915439f5SZhongyunde; RUN: opt < %s -passes=ipsccp -S | FileCheck %s 3915439f5SZhongyunde 4915439f5SZhongyundedeclare void @llvm.assume(i1) 5915439f5SZhongyundedeclare i8 @llvm.ctpop.i8(i8) 6915439f5SZhongyunde 7915439f5SZhongyunde; https://alive2.llvm.org/ce/z/LV_8xy 8915439f5SZhongyundedefine i8 @and_add_shl(i8 %x) { 9915439f5SZhongyunde; CHECK-LABEL: define i8 @and_add_shl 10915439f5SZhongyunde; CHECK-SAME: (i8 [[X:%.*]]) { 11915439f5SZhongyunde; CHECK-NEXT: [[OP1_P2:%.*]] = icmp ule i8 [[X]], 5 12915439f5SZhongyunde; CHECK-NEXT: call void @llvm.assume(i1 [[OP1_P2]]) 13915439f5SZhongyunde; CHECK-NEXT: [[SHIFT:%.*]] = shl nuw nsw i8 1, [[X]] 14915439f5SZhongyunde; CHECK-NEXT: [[SUB:%.*]] = add nsw i8 [[SHIFT]], -1 15915439f5SZhongyunde; CHECK-NEXT: ret i8 0 16915439f5SZhongyunde; 17915439f5SZhongyunde %op1_p2 = icmp ule i8 %x, 5 18915439f5SZhongyunde call void @llvm.assume(i1 %op1_p2) 19915439f5SZhongyunde %shift = shl i8 1, %x 20915439f5SZhongyunde %sub = add i8 %shift, -1 21915439f5SZhongyunde %r = and i8 %sub, 32 22915439f5SZhongyunde ret i8 %r 23915439f5SZhongyunde} 24915439f5SZhongyunde 25915439f5SZhongyunde; https://alive2.llvm.org/ce/z/YNYYdV 26915439f5SZhongyundedefine i8 @and_not_shl(i8 %x) { 27915439f5SZhongyunde; CHECK-LABEL: define i8 @and_not_shl 28915439f5SZhongyunde; CHECK-SAME: (i8 [[X:%.*]]) { 29915439f5SZhongyunde; CHECK-NEXT: [[OP1_P2:%.*]] = icmp ule i8 [[X]], 5 30915439f5SZhongyunde; CHECK-NEXT: call void @llvm.assume(i1 [[OP1_P2]]) 31915439f5SZhongyunde; CHECK-NEXT: [[SHIFT:%.*]] = shl nsw i8 -1, [[X]] 32915439f5SZhongyunde; CHECK-NEXT: [[NOT:%.*]] = xor i8 [[SHIFT]], -1 334dd392fcSNikita Popov; CHECK-NEXT: ret i8 0 34915439f5SZhongyunde; 35915439f5SZhongyunde %op1_p2 = icmp ule i8 %x, 5 36915439f5SZhongyunde call void @llvm.assume(i1 %op1_p2) 37915439f5SZhongyunde %shift = shl i8 -1, %x 38915439f5SZhongyunde %not = xor i8 %shift, -1 39915439f5SZhongyunde %r = and i8 %not, 32 40915439f5SZhongyunde ret i8 %r 41915439f5SZhongyunde} 42915439f5SZhongyunde 43915439f5SZhongyundedefine i8 @and_not_shl_1(i8 %x) { 44915439f5SZhongyunde; CHECK-LABEL: define i8 @and_not_shl_1 45915439f5SZhongyunde; CHECK-SAME: (i8 [[X:%.*]]) { 46915439f5SZhongyunde; CHECK-NEXT: [[OP1_P2:%.*]] = icmp ule i8 [[X]], 4 47915439f5SZhongyunde; CHECK-NEXT: call void @llvm.assume(i1 [[OP1_P2]]) 48915439f5SZhongyunde; CHECK-NEXT: [[SHIFT:%.*]] = shl nsw i8 -1, [[X]] 49915439f5SZhongyunde; CHECK-NEXT: [[NOT:%.*]] = xor i8 [[SHIFT]], -1 504dd392fcSNikita Popov; CHECK-NEXT: ret i8 0 51915439f5SZhongyunde; 52915439f5SZhongyunde %op1_p2 = icmp ule i8 %x, 4 53915439f5SZhongyunde call void @llvm.assume(i1 %op1_p2) 54915439f5SZhongyunde %shift = shl i8 -1, %x 55915439f5SZhongyunde %not = xor i8 %shift, -1 56915439f5SZhongyunde %r = and i8 %not, 48 ; 3 * 16 57915439f5SZhongyunde ret i8 %r 58915439f5SZhongyunde} 59915439f5SZhongyunde 60915439f5SZhongyunde; Negative test: https://alive2.llvm.org/ce/z/Zv4Pyu 61915439f5SZhongyundedefine i8 @and_add_shl_overlap(i8 %x) { 62*93de97d7SAndreas Jonson; CHECK-LABEL: define range(i8 0, 33) i8 @and_add_shl_overlap 63915439f5SZhongyunde; CHECK-SAME: (i8 [[X:%.*]]) { 64915439f5SZhongyunde; CHECK-NEXT: [[OP1_P2:%.*]] = icmp ule i8 [[X]], 6 65915439f5SZhongyunde; CHECK-NEXT: call void @llvm.assume(i1 [[OP1_P2]]) 66915439f5SZhongyunde; CHECK-NEXT: [[SHIFT:%.*]] = shl nuw nsw i8 1, [[X]] 67915439f5SZhongyunde; CHECK-NEXT: [[SUB:%.*]] = add nsw i8 [[SHIFT]], -1 68915439f5SZhongyunde; CHECK-NEXT: [[R:%.*]] = and i8 [[SUB]], 32 69915439f5SZhongyunde; CHECK-NEXT: ret i8 [[R]] 70915439f5SZhongyunde; 71915439f5SZhongyunde %op1_p2 = icmp ule i8 %x, 6 72915439f5SZhongyunde call void @llvm.assume(i1 %op1_p2) 73915439f5SZhongyunde %shift = shl i8 1, %x 74915439f5SZhongyunde %sub = add i8 %shift, -1 75915439f5SZhongyunde %r = and i8 %sub, 32 ; expect 64 76915439f5SZhongyunde ret i8 %r 77915439f5SZhongyunde} 78915439f5SZhongyunde 79915439f5SZhongyundedefine i8 @and_not_shl_overlap(i8 %x) { 80*93de97d7SAndreas Jonson; CHECK-LABEL: define range(i8 0, 5) i8 @and_not_shl_overlap 81915439f5SZhongyunde; CHECK-SAME: (i8 [[X:%.*]]) { 82915439f5SZhongyunde; CHECK-NEXT: [[OP1_P2:%.*]] = icmp ule i8 [[X]], 3 83915439f5SZhongyunde; CHECK-NEXT: call void @llvm.assume(i1 [[OP1_P2]]) 84915439f5SZhongyunde; CHECK-NEXT: [[SHIFT:%.*]] = shl nsw i8 -1, [[X]] 85915439f5SZhongyunde; CHECK-NEXT: [[NOT:%.*]] = xor i8 [[SHIFT]], -1 86915439f5SZhongyunde; CHECK-NEXT: [[R:%.*]] = and i8 [[NOT]], 4 87915439f5SZhongyunde; CHECK-NEXT: ret i8 [[R]] 88915439f5SZhongyunde; 89915439f5SZhongyunde %op1_p2 = icmp ule i8 %x, 3 90915439f5SZhongyunde call void @llvm.assume(i1 %op1_p2) 91915439f5SZhongyunde %shift = shl i8 -1, %x 92915439f5SZhongyunde %not = xor i8 %shift, -1 93915439f5SZhongyunde %r = and i8 %not, 4 ; expect 8 94915439f5SZhongyunde ret i8 %r 95915439f5SZhongyunde} 96