130d7dcc1SLuke Lau; REQUIRES: asserts 2*c836b895SDavid Sherwood; RUN: opt -passes=loop-vectorize -mtriple riscv64 -mattr=+v,+zvfh -debug-only=loop-vectorize --disable-output -riscv-v-register-bit-width-lmul=1 -S < %s 2>&1 | FileCheck %s --check-prefix=ZVFH 3*c836b895SDavid Sherwood; RUN: opt -passes=loop-vectorize -mtriple riscv64 -mattr=+v,+zvfhmin -debug-only=loop-vectorize --disable-output -riscv-v-register-bit-width-lmul=1 -S < %s 2>&1 | FileCheck %s --check-prefix=ZVFHMIN 441f1b467SLuke Lau 541f1b467SLuke Laudefine void @add(ptr noalias nocapture readonly %src1, ptr noalias nocapture readonly %src2, i32 signext %size, ptr noalias nocapture writeonly %result) { 641f1b467SLuke Lau; CHECK-LABEL: add 741f1b467SLuke Lau; ZVFH: LV(REG): Found max usage: 2 item 841f1b467SLuke Lau; ZVFH-NEXT: LV(REG): RegisterClass: RISCV::GPRRC, 2 registers 941f1b467SLuke Lau; ZVFH-NEXT: LV(REG): RegisterClass: RISCV::VRRC, 2 registers 1041f1b467SLuke Lau; ZVFH-NEXT: LV(REG): Found invariant usage: 1 item 1141f1b467SLuke Lau; ZVFH-NEXT: LV(REG): RegisterClass: RISCV::GPRRC, 1 registers 1241f1b467SLuke Lau; ZVFHMIN: LV(REG): Found max usage: 2 item 1341f1b467SLuke Lau; ZVFHMIN-NEXT: LV(REG): RegisterClass: RISCV::GPRRC, 2 registers 1441f1b467SLuke Lau; ZVFHMIN-NEXT: LV(REG): RegisterClass: RISCV::VRRC, 4 registers 1541f1b467SLuke Lau; ZVFHMIN-NEXT: LV(REG): Found invariant usage: 1 item 1641f1b467SLuke Lau; ZVFHMIN-NEXT: LV(REG): RegisterClass: RISCV::GPRRC, 1 registers 1741f1b467SLuke Lau 1841f1b467SLuke Lauentry: 1941f1b467SLuke Lau %conv = zext i32 %size to i64 2041f1b467SLuke Lau %cmp10.not = icmp eq i32 %size, 0 2141f1b467SLuke Lau br i1 %cmp10.not, label %for.cond.cleanup, label %for.body 2241f1b467SLuke Lau 2341f1b467SLuke Laufor.cond.cleanup: 2441f1b467SLuke Lau ret void 2541f1b467SLuke Lau 2641f1b467SLuke Laufor.body: 2741f1b467SLuke Lau %i.011 = phi i64 [ %add4, %for.body ], [ 0, %entry ] 2841f1b467SLuke Lau %arrayidx = getelementptr inbounds half, ptr %src1, i64 %i.011 2941f1b467SLuke Lau %0 = load half, ptr %arrayidx, align 4 3041f1b467SLuke Lau %arrayidx2 = getelementptr inbounds half, ptr %src2, i64 %i.011 3141f1b467SLuke Lau %1 = load half, ptr %arrayidx2, align 4 3241f1b467SLuke Lau %add = fadd half %0, %1 3341f1b467SLuke Lau %arrayidx3 = getelementptr inbounds half, ptr %result, i64 %i.011 3441f1b467SLuke Lau store half %add, ptr %arrayidx3, align 4 3541f1b467SLuke Lau %add4 = add nuw nsw i64 %i.011, 1 3641f1b467SLuke Lau %exitcond.not = icmp eq i64 %add4, %conv 3741f1b467SLuke Lau br i1 %exitcond.not, label %for.cond.cleanup, label %for.body 3841f1b467SLuke Lau} 39