130d7dcc1SLuke Lau; REQUIRES: asserts 2*c836b895SDavid Sherwood; RUN: opt -passes=loop-vectorize -mtriple riscv64 -mattr=+v,+zvfbfmin -debug-only=loop-vectorize --disable-output -riscv-v-register-bit-width-lmul=1 -S < %s 2>&1 | FileCheck %s 341f1b467SLuke Lau 441f1b467SLuke Laudefine void @add(ptr noalias nocapture readonly %src1, ptr noalias nocapture readonly %src2, i32 signext %size, ptr noalias nocapture writeonly %result) { 541f1b467SLuke Lau; CHECK-LABEL: add 641f1b467SLuke Lau; CHECK: LV(REG): Found max usage: 2 item 741f1b467SLuke Lau; CHECK-NEXT: LV(REG): RegisterClass: RISCV::GPRRC, 2 registers 841f1b467SLuke Lau; CHECK-NEXT: LV(REG): RegisterClass: RISCV::VRRC, 4 registers 941f1b467SLuke Lau; CHECK-NEXT: LV(REG): Found invariant usage: 1 item 1041f1b467SLuke Lau; CHECK-NEXT: LV(REG): RegisterClass: RISCV::GPRRC, 1 registers 1141f1b467SLuke Lau 1241f1b467SLuke Lauentry: 1341f1b467SLuke Lau %conv = zext i32 %size to i64 1441f1b467SLuke Lau %cmp10.not = icmp eq i32 %size, 0 1541f1b467SLuke Lau br i1 %cmp10.not, label %for.cond.cleanup, label %for.body 1641f1b467SLuke Lau 1741f1b467SLuke Laufor.cond.cleanup: 1841f1b467SLuke Lau ret void 1941f1b467SLuke Lau 2041f1b467SLuke Laufor.body: 2141f1b467SLuke Lau %i.011 = phi i64 [ %add4, %for.body ], [ 0, %entry ] 2241f1b467SLuke Lau %arrayidx = getelementptr inbounds bfloat, ptr %src1, i64 %i.011 2341f1b467SLuke Lau %0 = load bfloat, ptr %arrayidx, align 4 2441f1b467SLuke Lau %arrayidx2 = getelementptr inbounds bfloat, ptr %src2, i64 %i.011 2541f1b467SLuke Lau %1 = load bfloat, ptr %arrayidx2, align 4 2641f1b467SLuke Lau %add = fadd bfloat %0, %1 2741f1b467SLuke Lau %arrayidx3 = getelementptr inbounds bfloat, ptr %result, i64 %i.011 2841f1b467SLuke Lau store bfloat %add, ptr %arrayidx3, align 4 2941f1b467SLuke Lau %add4 = add nuw nsw i64 %i.011, 1 3041f1b467SLuke Lau %exitcond.not = icmp eq i64 %add4, %conv 3141f1b467SLuke Lau br i1 %exitcond.not, label %for.cond.cleanup, label %for.body 3241f1b467SLuke Lau} 33