xref: /llvm-project/llvm/test/Transforms/LoopVectorize/RISCV/lmul.ll (revision 56c091ea7106507b36015297ee9005c9d5fab0bf)
10b336e9eSLuke Lau; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
20b336e9eSLuke Lau; RUN: opt < %s -passes=loop-vectorize -mtriple riscv64 -mattr=+v -S --riscv-v-register-bit-width-lmul=1 | FileCheck %s -check-prefix=LMUL1
30b336e9eSLuke Lau; RUN: opt < %s -passes=loop-vectorize -mtriple riscv64 -mattr=+v -S --riscv-v-register-bit-width-lmul=2 | FileCheck %s -check-prefix=LMUL2
40b336e9eSLuke Lau; RUN: opt < %s -passes=loop-vectorize -mtriple riscv64 -mattr=+v -S --riscv-v-register-bit-width-lmul=4 | FileCheck %s -check-prefix=LMUL4
50b336e9eSLuke Lau; RUN: opt < %s -passes=loop-vectorize -mtriple riscv64 -mattr=+v -S --riscv-v-register-bit-width-lmul=8 | FileCheck %s -check-prefix=LMUL8
68d16c680SLuke Lau; RUN: opt < %s -passes=loop-vectorize -mtriple riscv64 -mattr=+v -S | FileCheck %s -check-prefix=LMUL2
70b336e9eSLuke Lau
80b336e9eSLuke Laudefine void @load_store(ptr %p) {
90b336e9eSLuke Lau; LMUL1-LABEL: @load_store(
100b336e9eSLuke Lau; LMUL1-NEXT:  entry:
110b336e9eSLuke Lau; LMUL1-NEXT:    [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
120b336e9eSLuke Lau; LMUL1-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 1024, [[TMP0]]
130b336e9eSLuke Lau; LMUL1-NEXT:    br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
140b336e9eSLuke Lau; LMUL1:       vector.ph:
150b336e9eSLuke Lau; LMUL1-NEXT:    [[TMP1:%.*]] = call i64 @llvm.vscale.i64()
160b336e9eSLuke Lau; LMUL1-NEXT:    [[N_MOD_VF:%.*]] = urem i64 1024, [[TMP1]]
170b336e9eSLuke Lau; LMUL1-NEXT:    [[N_VEC:%.*]] = sub i64 1024, [[N_MOD_VF]]
185ea6a3fcSFlorian Hahn; LMUL1-NEXT:    [[TMP6:%.*]] = call i64 @llvm.vscale.i64()
190b336e9eSLuke Lau; LMUL1-NEXT:    br label [[VECTOR_BODY:%.*]]
200b336e9eSLuke Lau; LMUL1:       vector.body:
210b336e9eSLuke Lau; LMUL1-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
220b336e9eSLuke Lau; LMUL1-NEXT:    [[TMP2:%.*]] = add i64 [[INDEX]], 0
230b336e9eSLuke Lau; LMUL1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds i64, ptr [[P:%.*]], i64 [[TMP2]]
240b336e9eSLuke Lau; LMUL1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds i64, ptr [[TMP3]], i32 0
25e39f6c18SAlex Richardson; LMUL1-NEXT:    [[WIDE_LOAD:%.*]] = load <vscale x 1 x i64>, ptr [[TMP4]], align 8
26*56c091eaSPaul Walker; LMUL1-NEXT:    [[TMP5:%.*]] = add <vscale x 1 x i64> [[WIDE_LOAD]], splat (i64 1)
27e39f6c18SAlex Richardson; LMUL1-NEXT:    store <vscale x 1 x i64> [[TMP5]], ptr [[TMP4]], align 8
280b336e9eSLuke Lau; LMUL1-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP6]]
290b336e9eSLuke Lau; LMUL1-NEXT:    [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
300b336e9eSLuke Lau; LMUL1-NEXT:    br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
310b336e9eSLuke Lau; LMUL1:       middle.block:
320b336e9eSLuke Lau; LMUL1-NEXT:    [[CMP_N:%.*]] = icmp eq i64 1024, [[N_VEC]]
330b336e9eSLuke Lau; LMUL1-NEXT:    br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
340b336e9eSLuke Lau; LMUL1:       scalar.ph:
350b336e9eSLuke Lau; LMUL1-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
360b336e9eSLuke Lau; LMUL1-NEXT:    br label [[FOR_BODY:%.*]]
370b336e9eSLuke Lau; LMUL1:       for.body:
380b336e9eSLuke Lau; LMUL1-NEXT:    [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY]] ]
390b336e9eSLuke Lau; LMUL1-NEXT:    [[Q:%.*]] = getelementptr inbounds i64, ptr [[P]], i64 [[IV]]
40e39f6c18SAlex Richardson; LMUL1-NEXT:    [[V:%.*]] = load i64, ptr [[Q]], align 8
410b336e9eSLuke Lau; LMUL1-NEXT:    [[W:%.*]] = add i64 [[V]], 1
42e39f6c18SAlex Richardson; LMUL1-NEXT:    store i64 [[W]], ptr [[Q]], align 8
430b336e9eSLuke Lau; LMUL1-NEXT:    [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
440b336e9eSLuke Lau; LMUL1-NEXT:    [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], 1024
450b336e9eSLuke Lau; LMUL1-NEXT:    br i1 [[EXITCOND_NOT]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
460b336e9eSLuke Lau; LMUL1:       for.end:
470b336e9eSLuke Lau; LMUL1-NEXT:    ret void
480b336e9eSLuke Lau;
490b336e9eSLuke Lau; LMUL2-LABEL: @load_store(
500b336e9eSLuke Lau; LMUL2-NEXT:  entry:
510b336e9eSLuke Lau; LMUL2-NEXT:    [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
5215f9cf16SLuke Lau; LMUL2-NEXT:    [[TMP1:%.*]] = mul i64 [[TMP0]], 2
530b336e9eSLuke Lau; LMUL2-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 1024, [[TMP1]]
540b336e9eSLuke Lau; LMUL2-NEXT:    br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
550b336e9eSLuke Lau; LMUL2:       vector.ph:
560b336e9eSLuke Lau; LMUL2-NEXT:    [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
5715f9cf16SLuke Lau; LMUL2-NEXT:    [[TMP3:%.*]] = mul i64 [[TMP2]], 2
580b336e9eSLuke Lau; LMUL2-NEXT:    [[N_MOD_VF:%.*]] = urem i64 1024, [[TMP3]]
590b336e9eSLuke Lau; LMUL2-NEXT:    [[N_VEC:%.*]] = sub i64 1024, [[N_MOD_VF]]
605ea6a3fcSFlorian Hahn; LMUL2-NEXT:    [[TMP8:%.*]] = call i64 @llvm.vscale.i64()
615ea6a3fcSFlorian Hahn; LMUL2-NEXT:    [[TMP9:%.*]] = mul i64 [[TMP8]], 2
620b336e9eSLuke Lau; LMUL2-NEXT:    br label [[VECTOR_BODY:%.*]]
630b336e9eSLuke Lau; LMUL2:       vector.body:
640b336e9eSLuke Lau; LMUL2-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
650b336e9eSLuke Lau; LMUL2-NEXT:    [[TMP4:%.*]] = add i64 [[INDEX]], 0
6615f9cf16SLuke Lau; LMUL2-NEXT:    [[TMP5:%.*]] = getelementptr inbounds i64, ptr [[P:%.*]], i64 [[TMP4]]
6715f9cf16SLuke Lau; LMUL2-NEXT:    [[TMP6:%.*]] = getelementptr inbounds i64, ptr [[TMP5]], i32 0
68e39f6c18SAlex Richardson; LMUL2-NEXT:    [[WIDE_LOAD:%.*]] = load <vscale x 2 x i64>, ptr [[TMP6]], align 8
69*56c091eaSPaul Walker; LMUL2-NEXT:    [[TMP7:%.*]] = add <vscale x 2 x i64> [[WIDE_LOAD]], splat (i64 1)
70e39f6c18SAlex Richardson; LMUL2-NEXT:    store <vscale x 2 x i64> [[TMP7]], ptr [[TMP6]], align 8
7115f9cf16SLuke Lau; LMUL2-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP9]]
7215f9cf16SLuke Lau; LMUL2-NEXT:    [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
7315f9cf16SLuke Lau; LMUL2-NEXT:    br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
740b336e9eSLuke Lau; LMUL2:       middle.block:
750b336e9eSLuke Lau; LMUL2-NEXT:    [[CMP_N:%.*]] = icmp eq i64 1024, [[N_VEC]]
760b336e9eSLuke Lau; LMUL2-NEXT:    br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
770b336e9eSLuke Lau; LMUL2:       scalar.ph:
780b336e9eSLuke Lau; LMUL2-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
790b336e9eSLuke Lau; LMUL2-NEXT:    br label [[FOR_BODY:%.*]]
800b336e9eSLuke Lau; LMUL2:       for.body:
810b336e9eSLuke Lau; LMUL2-NEXT:    [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY]] ]
820b336e9eSLuke Lau; LMUL2-NEXT:    [[Q:%.*]] = getelementptr inbounds i64, ptr [[P]], i64 [[IV]]
83e39f6c18SAlex Richardson; LMUL2-NEXT:    [[V:%.*]] = load i64, ptr [[Q]], align 8
840b336e9eSLuke Lau; LMUL2-NEXT:    [[W:%.*]] = add i64 [[V]], 1
85e39f6c18SAlex Richardson; LMUL2-NEXT:    store i64 [[W]], ptr [[Q]], align 8
860b336e9eSLuke Lau; LMUL2-NEXT:    [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
870b336e9eSLuke Lau; LMUL2-NEXT:    [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], 1024
880b336e9eSLuke Lau; LMUL2-NEXT:    br i1 [[EXITCOND_NOT]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
890b336e9eSLuke Lau; LMUL2:       for.end:
900b336e9eSLuke Lau; LMUL2-NEXT:    ret void
910b336e9eSLuke Lau;
920b336e9eSLuke Lau; LMUL4-LABEL: @load_store(
930b336e9eSLuke Lau; LMUL4-NEXT:  entry:
940b336e9eSLuke Lau; LMUL4-NEXT:    [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
9515f9cf16SLuke Lau; LMUL4-NEXT:    [[TMP1:%.*]] = mul i64 [[TMP0]], 4
960b336e9eSLuke Lau; LMUL4-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 1024, [[TMP1]]
970b336e9eSLuke Lau; LMUL4-NEXT:    br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
980b336e9eSLuke Lau; LMUL4:       vector.ph:
990b336e9eSLuke Lau; LMUL4-NEXT:    [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
10015f9cf16SLuke Lau; LMUL4-NEXT:    [[TMP3:%.*]] = mul i64 [[TMP2]], 4
1010b336e9eSLuke Lau; LMUL4-NEXT:    [[N_MOD_VF:%.*]] = urem i64 1024, [[TMP3]]
1020b336e9eSLuke Lau; LMUL4-NEXT:    [[N_VEC:%.*]] = sub i64 1024, [[N_MOD_VF]]
1035ea6a3fcSFlorian Hahn; LMUL4-NEXT:    [[TMP8:%.*]] = call i64 @llvm.vscale.i64()
1045ea6a3fcSFlorian Hahn; LMUL4-NEXT:    [[TMP9:%.*]] = mul i64 [[TMP8]], 4
1050b336e9eSLuke Lau; LMUL4-NEXT:    br label [[VECTOR_BODY:%.*]]
1060b336e9eSLuke Lau; LMUL4:       vector.body:
1070b336e9eSLuke Lau; LMUL4-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
1080b336e9eSLuke Lau; LMUL4-NEXT:    [[TMP4:%.*]] = add i64 [[INDEX]], 0
10915f9cf16SLuke Lau; LMUL4-NEXT:    [[TMP5:%.*]] = getelementptr inbounds i64, ptr [[P:%.*]], i64 [[TMP4]]
11015f9cf16SLuke Lau; LMUL4-NEXT:    [[TMP6:%.*]] = getelementptr inbounds i64, ptr [[TMP5]], i32 0
111e39f6c18SAlex Richardson; LMUL4-NEXT:    [[WIDE_LOAD:%.*]] = load <vscale x 4 x i64>, ptr [[TMP6]], align 8
112*56c091eaSPaul Walker; LMUL4-NEXT:    [[TMP7:%.*]] = add <vscale x 4 x i64> [[WIDE_LOAD]], splat (i64 1)
113e39f6c18SAlex Richardson; LMUL4-NEXT:    store <vscale x 4 x i64> [[TMP7]], ptr [[TMP6]], align 8
11415f9cf16SLuke Lau; LMUL4-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP9]]
11515f9cf16SLuke Lau; LMUL4-NEXT:    [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
11615f9cf16SLuke Lau; LMUL4-NEXT:    br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
1170b336e9eSLuke Lau; LMUL4:       middle.block:
1180b336e9eSLuke Lau; LMUL4-NEXT:    [[CMP_N:%.*]] = icmp eq i64 1024, [[N_VEC]]
1190b336e9eSLuke Lau; LMUL4-NEXT:    br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
1200b336e9eSLuke Lau; LMUL4:       scalar.ph:
1210b336e9eSLuke Lau; LMUL4-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
1220b336e9eSLuke Lau; LMUL4-NEXT:    br label [[FOR_BODY:%.*]]
1230b336e9eSLuke Lau; LMUL4:       for.body:
1240b336e9eSLuke Lau; LMUL4-NEXT:    [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY]] ]
1250b336e9eSLuke Lau; LMUL4-NEXT:    [[Q:%.*]] = getelementptr inbounds i64, ptr [[P]], i64 [[IV]]
126e39f6c18SAlex Richardson; LMUL4-NEXT:    [[V:%.*]] = load i64, ptr [[Q]], align 8
1270b336e9eSLuke Lau; LMUL4-NEXT:    [[W:%.*]] = add i64 [[V]], 1
128e39f6c18SAlex Richardson; LMUL4-NEXT:    store i64 [[W]], ptr [[Q]], align 8
1290b336e9eSLuke Lau; LMUL4-NEXT:    [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
1300b336e9eSLuke Lau; LMUL4-NEXT:    [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], 1024
1310b336e9eSLuke Lau; LMUL4-NEXT:    br i1 [[EXITCOND_NOT]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
1320b336e9eSLuke Lau; LMUL4:       for.end:
1330b336e9eSLuke Lau; LMUL4-NEXT:    ret void
1340b336e9eSLuke Lau;
1350b336e9eSLuke Lau; LMUL8-LABEL: @load_store(
1360b336e9eSLuke Lau; LMUL8-NEXT:  entry:
1370b336e9eSLuke Lau; LMUL8-NEXT:    [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
13815f9cf16SLuke Lau; LMUL8-NEXT:    [[TMP1:%.*]] = mul i64 [[TMP0]], 8
1390b336e9eSLuke Lau; LMUL8-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 1024, [[TMP1]]
1400b336e9eSLuke Lau; LMUL8-NEXT:    br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
1410b336e9eSLuke Lau; LMUL8:       vector.ph:
1420b336e9eSLuke Lau; LMUL8-NEXT:    [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
14315f9cf16SLuke Lau; LMUL8-NEXT:    [[TMP3:%.*]] = mul i64 [[TMP2]], 8
1440b336e9eSLuke Lau; LMUL8-NEXT:    [[N_MOD_VF:%.*]] = urem i64 1024, [[TMP3]]
1450b336e9eSLuke Lau; LMUL8-NEXT:    [[N_VEC:%.*]] = sub i64 1024, [[N_MOD_VF]]
1465ea6a3fcSFlorian Hahn; LMUL8-NEXT:    [[TMP8:%.*]] = call i64 @llvm.vscale.i64()
1475ea6a3fcSFlorian Hahn; LMUL8-NEXT:    [[TMP9:%.*]] = mul i64 [[TMP8]], 8
1480b336e9eSLuke Lau; LMUL8-NEXT:    br label [[VECTOR_BODY:%.*]]
1490b336e9eSLuke Lau; LMUL8:       vector.body:
1500b336e9eSLuke Lau; LMUL8-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
1510b336e9eSLuke Lau; LMUL8-NEXT:    [[TMP4:%.*]] = add i64 [[INDEX]], 0
15215f9cf16SLuke Lau; LMUL8-NEXT:    [[TMP5:%.*]] = getelementptr inbounds i64, ptr [[P:%.*]], i64 [[TMP4]]
15315f9cf16SLuke Lau; LMUL8-NEXT:    [[TMP6:%.*]] = getelementptr inbounds i64, ptr [[TMP5]], i32 0
154e39f6c18SAlex Richardson; LMUL8-NEXT:    [[WIDE_LOAD:%.*]] = load <vscale x 8 x i64>, ptr [[TMP6]], align 8
155*56c091eaSPaul Walker; LMUL8-NEXT:    [[TMP7:%.*]] = add <vscale x 8 x i64> [[WIDE_LOAD]], splat (i64 1)
156e39f6c18SAlex Richardson; LMUL8-NEXT:    store <vscale x 8 x i64> [[TMP7]], ptr [[TMP6]], align 8
15715f9cf16SLuke Lau; LMUL8-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP9]]
15815f9cf16SLuke Lau; LMUL8-NEXT:    [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
15915f9cf16SLuke Lau; LMUL8-NEXT:    br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
1600b336e9eSLuke Lau; LMUL8:       middle.block:
1610b336e9eSLuke Lau; LMUL8-NEXT:    [[CMP_N:%.*]] = icmp eq i64 1024, [[N_VEC]]
1620b336e9eSLuke Lau; LMUL8-NEXT:    br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
1630b336e9eSLuke Lau; LMUL8:       scalar.ph:
1640b336e9eSLuke Lau; LMUL8-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
1650b336e9eSLuke Lau; LMUL8-NEXT:    br label [[FOR_BODY:%.*]]
1660b336e9eSLuke Lau; LMUL8:       for.body:
1670b336e9eSLuke Lau; LMUL8-NEXT:    [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY]] ]
1680b336e9eSLuke Lau; LMUL8-NEXT:    [[Q:%.*]] = getelementptr inbounds i64, ptr [[P]], i64 [[IV]]
169e39f6c18SAlex Richardson; LMUL8-NEXT:    [[V:%.*]] = load i64, ptr [[Q]], align 8
1700b336e9eSLuke Lau; LMUL8-NEXT:    [[W:%.*]] = add i64 [[V]], 1
171e39f6c18SAlex Richardson; LMUL8-NEXT:    store i64 [[W]], ptr [[Q]], align 8
1720b336e9eSLuke Lau; LMUL8-NEXT:    [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
1730b336e9eSLuke Lau; LMUL8-NEXT:    [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], 1024
1740b336e9eSLuke Lau; LMUL8-NEXT:    br i1 [[EXITCOND_NOT]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
1750b336e9eSLuke Lau; LMUL8:       for.end:
1760b336e9eSLuke Lau; LMUL8-NEXT:    ret void
1770b336e9eSLuke Lau;
1780b336e9eSLuke Lauentry:
1790b336e9eSLuke Lau  br label %for.body
1800b336e9eSLuke Lau
1810b336e9eSLuke Laufor.body:
1820b336e9eSLuke Lau  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
1830b336e9eSLuke Lau  %q = getelementptr inbounds i64, ptr %p, i64 %iv
1840b336e9eSLuke Lau  %v = load i64, ptr %q
1850b336e9eSLuke Lau  %w = add i64 %v, 1
1860b336e9eSLuke Lau  store i64 %w, ptr %q
1870b336e9eSLuke Lau  %iv.next = add nuw nsw i64 %iv, 1
1880b336e9eSLuke Lau  %exitcond.not = icmp eq i64 %iv.next, 1024
1890b336e9eSLuke Lau  br i1 %exitcond.not, label %for.end, label %for.body
1900b336e9eSLuke Lau
1910b336e9eSLuke Laufor.end:
1920b336e9eSLuke Lau  ret void
1930b336e9eSLuke Lau}
194