1*cee313d2SEric Christopher; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2*cee313d2SEric Christopher; RUN: opt -lsr-complexity-limit=50 -loop-reduce -S %s | FileCheck %s 3*cee313d2SEric Christopher 4*cee313d2SEric Christophertarget datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" 5*cee313d2SEric Christopher 6*cee313d2SEric Christopherdefine void @overflow1(i64 %a) { 7*cee313d2SEric Christopher; CHECK-LABEL: @overflow1( 8*cee313d2SEric Christopher; CHECK-NEXT: bb: 9*cee313d2SEric Christopher; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[A:%.*]], -1 10*cee313d2SEric Christopher; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[A]], -9223372036854775808 11*cee313d2SEric Christopher; CHECK-NEXT: br label [[BB1:%.*]] 12*cee313d2SEric Christopher; CHECK: bb1: 13*cee313d2SEric Christopher; CHECK-NEXT: [[LSR_IV1:%.*]] = phi i64 [ [[LSR_IV_NEXT2:%.*]], [[BB1]] ], [ [[TMP1]], [[BB:%.*]] ] 14*cee313d2SEric Christopher; CHECK-NEXT: [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT:%.*]], [[BB1]] ], [ [[TMP0]], [[BB]] ] 15*cee313d2SEric Christopher; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i64 [[LSR_IV1]], 0 16*cee313d2SEric Christopher; CHECK-NEXT: [[TMP5:%.*]] = and i1 [[TMP4]], true 17*cee313d2SEric Christopher; CHECK-NEXT: [[LSR_IV_NEXT]] = add i64 [[LSR_IV]], 1 18*cee313d2SEric Christopher; CHECK-NEXT: [[LSR_IV_NEXT2]] = add i64 [[LSR_IV1]], 1 19*cee313d2SEric Christopher; CHECK-NEXT: br i1 [[TMP5]], label [[BB1]], label [[BB7:%.*]] 20*cee313d2SEric Christopher; CHECK: bb7: 21*cee313d2SEric Christopher; CHECK-NEXT: [[TMP9:%.*]] = and i64 [[LSR_IV_NEXT]], 1 22*cee313d2SEric Christopher; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP9]], 0 23*cee313d2SEric Christopher; CHECK-NEXT: unreachable 24*cee313d2SEric Christopher; 25*cee313d2SEric Christopherbb: 26*cee313d2SEric Christopher br label %bb1 27*cee313d2SEric Christopher 28*cee313d2SEric Christopherbb1: ; preds = %bb1, %bb 29*cee313d2SEric Christopher %tmp = phi i64 [ %a, %bb ], [ %tmp6, %bb1 ] 30*cee313d2SEric Christopher %tmp4 = icmp ne i64 %tmp, -9223372036854775808 31*cee313d2SEric Christopher %tmp5 = and i1 %tmp4, 1 32*cee313d2SEric Christopher %tmp6 = add i64 %tmp, 1 33*cee313d2SEric Christopher br i1 %tmp5, label %bb1, label %bb7 34*cee313d2SEric Christopher 35*cee313d2SEric Christopherbb7: ; preds = %bb1 36*cee313d2SEric Christopher %tmp9 = and i64 %tmp, 1 37*cee313d2SEric Christopher %tmp10 = icmp eq i64 %tmp9, 0 38*cee313d2SEric Christopher unreachable 39*cee313d2SEric Christopher} 40