1c9cd5bcfSeopXD; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 210da9844SeopXD; RUN: llc < %s -O3 -mattr=+v -lsr-drop-solution | FileCheck --check-prefix=CHECK %s 3c9cd5bcfSeopXD 4c9cd5bcfSeopXDtarget datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128" 5c9cd5bcfSeopXDtarget triple = "riscv64-unknown-linux-gnu" 6c9cd5bcfSeopXD 7c9cd5bcfSeopXDdefine ptr @foo(ptr %a0, ptr %a1, i64 %a2) { 8c9cd5bcfSeopXD; CHECK-LABEL: foo: 9c9cd5bcfSeopXD; CHECK: # %bb.0: # %entry 107638409dSCraig Topper; CHECK-NEXT: vsetvli a4, a2, e8, m8, ta, ma 11c9cd5bcfSeopXD; CHECK-NEXT: bne a4, a2, .LBB0_2 12c9cd5bcfSeopXD; CHECK-NEXT: # %bb.1: 13c9cd5bcfSeopXD; CHECK-NEXT: vsetvli zero, a2, e8, m8, ta, ma 14c9cd5bcfSeopXD; CHECK-NEXT: vle8.v v8, (a1) 15*5fdab3c8Swangpc; CHECK-NEXT: vse8.v v8, (a0) 16c9cd5bcfSeopXD; CHECK-NEXT: ret 17c9cd5bcfSeopXD; CHECK-NEXT: .LBB0_2: # %if.then 1810da9844SeopXD; CHECK-NEXT: add a2, a0, a2 1910da9844SeopXD; CHECK-NEXT: sub a5, a2, a4 2010da9844SeopXD; CHECK-NEXT: mv a3, a0 21c9cd5bcfSeopXD; CHECK-NEXT: .LBB0_3: # %do.body 22c9cd5bcfSeopXD; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 2310da9844SeopXD; CHECK-NEXT: vle8.v v8, (a1) 2410da9844SeopXD; CHECK-NEXT: vse8.v v8, (a3) 2510da9844SeopXD; CHECK-NEXT: add a3, a3, a4 2610da9844SeopXD; CHECK-NEXT: add a1, a1, a4 2710da9844SeopXD; CHECK-NEXT: bltu a3, a5, .LBB0_3 28c9cd5bcfSeopXD; CHECK-NEXT: # %bb.4: # %do.end 2910da9844SeopXD; CHECK-NEXT: sub a2, a2, a3 307638409dSCraig Topper; CHECK-NEXT: vsetvli a2, a2, e8, m8, ta, ma 31c9cd5bcfSeopXD; CHECK-NEXT: vsetvli zero, a2, e8, m8, ta, ma 32c9cd5bcfSeopXD; CHECK-NEXT: vle8.v v8, (a1) 33c9cd5bcfSeopXD; CHECK-NEXT: vse8.v v8, (a3) 34c9cd5bcfSeopXD; CHECK-NEXT: ret 35c9cd5bcfSeopXDentry: 36c9cd5bcfSeopXD %0 = ptrtoint ptr %a0 to i64 37c9cd5bcfSeopXD %1 = tail call i64 @llvm.riscv.vsetvli.i64(i64 %a2, i64 0, i64 3) 38c9cd5bcfSeopXD %cmp.not = icmp eq i64 %1, %a2 39c9cd5bcfSeopXD br i1 %cmp.not, label %if.end, label %if.then 40c9cd5bcfSeopXD 41c9cd5bcfSeopXDif.then: ; preds = %entry 42c9cd5bcfSeopXD %add = add i64 %0, %a2 43c9cd5bcfSeopXD %sub = sub i64 %add, %1 44c9cd5bcfSeopXD br label %do.body 45c9cd5bcfSeopXD 46c9cd5bcfSeopXDdo.body: ; preds = %do.body, %if.then 47c9cd5bcfSeopXD %a3.0 = phi i64 [ %0, %if.then ], [ %add1, %do.body ] 48c9cd5bcfSeopXD %a1.addr.0 = phi ptr [ %a1, %if.then ], [ %add.ptr, %do.body ] 49c9cd5bcfSeopXD %2 = tail call <vscale x 64 x i8> @llvm.riscv.vle.nxv64i8.i64(<vscale x 64 x i8> undef, ptr %a1.addr.0, i64 %1) 50c9cd5bcfSeopXD %3 = inttoptr i64 %a3.0 to ptr 51c9cd5bcfSeopXD tail call void @llvm.riscv.vse.nxv64i8.i64(<vscale x 64 x i8> %2, ptr %3, i64 %1) 52c9cd5bcfSeopXD %add1 = add i64 %a3.0, %1 53c9cd5bcfSeopXD %add.ptr = getelementptr i8, ptr %a1.addr.0, i64 %1 54c9cd5bcfSeopXD %cmp2 = icmp ugt i64 %sub, %add1 55c9cd5bcfSeopXD br i1 %cmp2, label %do.body, label %do.end 56c9cd5bcfSeopXD 57c9cd5bcfSeopXDdo.end: ; preds = %do.body 58c9cd5bcfSeopXD %sub4 = sub i64 %add, %add1 59c9cd5bcfSeopXD %4 = tail call i64 @llvm.riscv.vsetvli.i64(i64 %sub4, i64 0, i64 3) 60c9cd5bcfSeopXD br label %if.end 61c9cd5bcfSeopXD 62c9cd5bcfSeopXDif.end: ; preds = %do.end, %entry 63c9cd5bcfSeopXD %a3.1 = phi i64 [ %add1, %do.end ], [ %0, %entry ] 64c9cd5bcfSeopXD %t0.0 = phi i64 [ %4, %do.end ], [ %a2, %entry ] 65c9cd5bcfSeopXD %a1.addr.1 = phi ptr [ %add.ptr, %do.end ], [ %a1, %entry ] 66c9cd5bcfSeopXD %5 = tail call <vscale x 64 x i8> @llvm.riscv.vle.nxv64i8.i64(<vscale x 64 x i8> undef, ptr %a1.addr.1, i64 %t0.0) 67c9cd5bcfSeopXD %6 = inttoptr i64 %a3.1 to ptr 68c9cd5bcfSeopXD tail call void @llvm.riscv.vse.nxv64i8.i64(<vscale x 64 x i8> %5, ptr %6, i64 %t0.0) 69c9cd5bcfSeopXD ret ptr %a0 70c9cd5bcfSeopXD} 71c9cd5bcfSeopXD 72c9cd5bcfSeopXDdeclare i64 @llvm.riscv.vsetvli.i64(i64, i64 immarg, i64 immarg) 73c9cd5bcfSeopXD 74c9cd5bcfSeopXDdeclare <vscale x 64 x i8> @llvm.riscv.vle.nxv64i8.i64(<vscale x 64 x i8>, ptr nocapture, i64) 75c9cd5bcfSeopXD 76c9cd5bcfSeopXDdeclare void @llvm.riscv.vse.nxv64i8.i64(<vscale x 64 x i8>, ptr nocapture, i64) 77