110da9844SeopXD; REQUIRES: asserts 210da9844SeopXD; RUN: llc < %s -O3 -mattr=+v -debug -lsr-drop-solution 2>&1 | FileCheck --check-prefix=DEBUG %s 310da9844SeopXD; RUN: llc < %s -O3 -mattr=+v -debug 2>&1 | FileCheck --check-prefix=DEBUG2 %s 410da9844SeopXD 510da9844SeopXDtarget datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128" 610da9844SeopXDtarget triple = "riscv64-unknown-linux-gnu" 710da9844SeopXD 810da9844SeopXDdefine ptr @foo(ptr %a0, ptr %a1, i64 %a2) { 910da9844SeopXD;DEBUG: The baseline solution requires 2 instructions 4 regs, with addrec cost 2, plus 3 setup cost 10*baca93fcSPhilip Reames;DEBUG: The chosen solution requires 3 instructions 6 regs, with addrec cost 1, plus 2 base adds, plus 5 setup cost 1110da9844SeopXD;DEBUG: Baseline is more profitable than chosen solution, dropping LSR solution. 1210da9844SeopXD 1310da9844SeopXD;DEBUG2: Baseline is more profitable than chosen solution, add option 'lsr-drop-solution' to drop LSR solution. 1410da9844SeopXDentry: 1510da9844SeopXD %0 = ptrtoint ptr %a0 to i64 1610da9844SeopXD %1 = tail call i64 @llvm.riscv.vsetvli.i64(i64 %a2, i64 0, i64 3) 1710da9844SeopXD %cmp.not = icmp eq i64 %1, %a2 1810da9844SeopXD br i1 %cmp.not, label %if.end, label %if.then 1910da9844SeopXD 2010da9844SeopXDif.then: ; preds = %entry 2110da9844SeopXD %add = add i64 %0, %a2 2210da9844SeopXD %sub = sub i64 %add, %1 2310da9844SeopXD br label %do.body 2410da9844SeopXD 2510da9844SeopXDdo.body: ; preds = %do.body, %if.then 2610da9844SeopXD %a3.0 = phi i64 [ %0, %if.then ], [ %add1, %do.body ] 2710da9844SeopXD %a1.addr.0 = phi ptr [ %a1, %if.then ], [ %add.ptr, %do.body ] 2810da9844SeopXD %2 = tail call <vscale x 64 x i8> @llvm.riscv.vle.nxv64i8.i64(<vscale x 64 x i8> undef, ptr %a1.addr.0, i64 %1) 2910da9844SeopXD %3 = inttoptr i64 %a3.0 to ptr 3010da9844SeopXD tail call void @llvm.riscv.vse.nxv64i8.i64(<vscale x 64 x i8> %2, ptr %3, i64 %1) 3110da9844SeopXD %add1 = add i64 %a3.0, %1 3210da9844SeopXD %add.ptr = getelementptr i8, ptr %a1.addr.0, i64 %1 3310da9844SeopXD %cmp2 = icmp ugt i64 %sub, %add1 3410da9844SeopXD br i1 %cmp2, label %do.body, label %do.end 3510da9844SeopXD 3610da9844SeopXDdo.end: ; preds = %do.body 3710da9844SeopXD %sub4 = sub i64 %add, %add1 3810da9844SeopXD %4 = tail call i64 @llvm.riscv.vsetvli.i64(i64 %sub4, i64 0, i64 3) 3910da9844SeopXD br label %if.end 4010da9844SeopXD 4110da9844SeopXDif.end: ; preds = %do.end, %entry 4210da9844SeopXD %a3.1 = phi i64 [ %add1, %do.end ], [ %0, %entry ] 4310da9844SeopXD %t0.0 = phi i64 [ %4, %do.end ], [ %a2, %entry ] 4410da9844SeopXD %a1.addr.1 = phi ptr [ %add.ptr, %do.end ], [ %a1, %entry ] 4510da9844SeopXD %5 = tail call <vscale x 64 x i8> @llvm.riscv.vle.nxv64i8.i64(<vscale x 64 x i8> undef, ptr %a1.addr.1, i64 %t0.0) 4610da9844SeopXD %6 = inttoptr i64 %a3.1 to ptr 4710da9844SeopXD tail call void @llvm.riscv.vse.nxv64i8.i64(<vscale x 64 x i8> %5, ptr %6, i64 %t0.0) 4810da9844SeopXD ret ptr %a0 4910da9844SeopXD} 5010da9844SeopXD 5110da9844SeopXDdeclare i64 @llvm.riscv.vsetvli.i64(i64, i64 immarg, i64 immarg) 5210da9844SeopXD 5310da9844SeopXDdeclare <vscale x 64 x i8> @llvm.riscv.vle.nxv64i8.i64(<vscale x 64 x i8>, ptr nocapture, i64) 5410da9844SeopXD 5510da9844SeopXDdeclare void @llvm.riscv.vse.nxv64i8.i64(<vscale x 64 x i8>, ptr nocapture, i64) 56