xref: /llvm-project/llvm/test/Transforms/InstCombine/switch-shl.ll (revision 1259c0512292a6559fb073b16056bff2e934822b)
1*1259c051SYingwei Zheng; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
2*1259c051SYingwei Zheng; RUN: opt < %s -passes=instcombine -S | FileCheck %s
3*1259c051SYingwei Zheng
4*1259c051SYingwei Zhengdefine i1 @test_switch_with_shl_mask(i32 %a) {
5*1259c051SYingwei Zheng; CHECK-LABEL: define i1 @test_switch_with_shl_mask(
6*1259c051SYingwei Zheng; CHECK-SAME: i32 [[A:%.*]]) {
7*1259c051SYingwei Zheng; CHECK-NEXT:  entry:
8*1259c051SYingwei Zheng; CHECK-NEXT:    [[TRUNC:%.*]] = trunc i32 [[A]] to i8
9*1259c051SYingwei Zheng; CHECK-NEXT:    switch i8 [[TRUNC]], label [[SW_DEFAULT:%.*]] [
10*1259c051SYingwei Zheng; CHECK-NEXT:      i8 0, label [[SW_BB:%.*]]
11*1259c051SYingwei Zheng; CHECK-NEXT:      i8 1, label [[SW_BB]]
12*1259c051SYingwei Zheng; CHECK-NEXT:      i8 -128, label [[SW_BB]]
13*1259c051SYingwei Zheng; CHECK-NEXT:    ]
14*1259c051SYingwei Zheng; CHECK:       sw.bb:
15*1259c051SYingwei Zheng; CHECK-NEXT:    ret i1 true
16*1259c051SYingwei Zheng; CHECK:       sw.default:
17*1259c051SYingwei Zheng; CHECK-NEXT:    ret i1 false
18*1259c051SYingwei Zheng;
19*1259c051SYingwei Zhengentry:
20*1259c051SYingwei Zheng  %b = shl i32 %a, 24
21*1259c051SYingwei Zheng  switch i32 %b, label %sw.default [
22*1259c051SYingwei Zheng  i32 0, label %sw.bb
23*1259c051SYingwei Zheng  i32 16777216, label %sw.bb
24*1259c051SYingwei Zheng  i32 2147483648, label %sw.bb
25*1259c051SYingwei Zheng  ]
26*1259c051SYingwei Zheng
27*1259c051SYingwei Zhengsw.bb:
28*1259c051SYingwei Zheng  ret i1 true
29*1259c051SYingwei Zhengsw.default:
30*1259c051SYingwei Zheng  ret i1 false
31*1259c051SYingwei Zheng}
32*1259c051SYingwei Zheng
33*1259c051SYingwei Zhengdefine i1 @test_switch_with_shl_nuw_multiuse(i32 %a) {
34*1259c051SYingwei Zheng; CHECK-LABEL: define i1 @test_switch_with_shl_nuw_multiuse(
35*1259c051SYingwei Zheng; CHECK-SAME: i32 [[A:%.*]]) {
36*1259c051SYingwei Zheng; CHECK-NEXT:  entry:
37*1259c051SYingwei Zheng; CHECK-NEXT:    [[B:%.*]] = shl nuw i32 [[A]], 24
38*1259c051SYingwei Zheng; CHECK-NEXT:    call void @use(i32 [[B]])
39*1259c051SYingwei Zheng; CHECK-NEXT:    switch i32 [[A]], label [[SW_DEFAULT:%.*]] [
40*1259c051SYingwei Zheng; CHECK-NEXT:      i32 0, label [[SW_BB:%.*]]
41*1259c051SYingwei Zheng; CHECK-NEXT:      i32 1, label [[SW_BB]]
42*1259c051SYingwei Zheng; CHECK-NEXT:      i32 128, label [[SW_BB]]
43*1259c051SYingwei Zheng; CHECK-NEXT:    ]
44*1259c051SYingwei Zheng; CHECK:       sw.bb:
45*1259c051SYingwei Zheng; CHECK-NEXT:    ret i1 true
46*1259c051SYingwei Zheng; CHECK:       sw.default:
47*1259c051SYingwei Zheng; CHECK-NEXT:    ret i1 false
48*1259c051SYingwei Zheng;
49*1259c051SYingwei Zhengentry:
50*1259c051SYingwei Zheng  %b = shl nuw i32 %a, 24
51*1259c051SYingwei Zheng  call void @use(i32 %b)
52*1259c051SYingwei Zheng  switch i32 %b, label %sw.default [
53*1259c051SYingwei Zheng  i32 0, label %sw.bb
54*1259c051SYingwei Zheng  i32 16777216, label %sw.bb
55*1259c051SYingwei Zheng  i32 2147483648, label %sw.bb
56*1259c051SYingwei Zheng  ]
57*1259c051SYingwei Zheng
58*1259c051SYingwei Zhengsw.bb:
59*1259c051SYingwei Zheng  ret i1 true
60*1259c051SYingwei Zhengsw.default:
61*1259c051SYingwei Zheng  ret i1 false
62*1259c051SYingwei Zheng}
63*1259c051SYingwei Zheng
64*1259c051SYingwei Zhengdefine i1 @test_switch_with_shl_nsw_multiuse(i32 %a) {
65*1259c051SYingwei Zheng; CHECK-LABEL: define i1 @test_switch_with_shl_nsw_multiuse(
66*1259c051SYingwei Zheng; CHECK-SAME: i32 [[A:%.*]]) {
67*1259c051SYingwei Zheng; CHECK-NEXT:  entry:
68*1259c051SYingwei Zheng; CHECK-NEXT:    [[B:%.*]] = shl nsw i32 [[A]], 24
69*1259c051SYingwei Zheng; CHECK-NEXT:    call void @use(i32 [[B]])
70*1259c051SYingwei Zheng; CHECK-NEXT:    switch i32 [[A]], label [[SW_DEFAULT:%.*]] [
71*1259c051SYingwei Zheng; CHECK-NEXT:      i32 0, label [[SW_BB:%.*]]
72*1259c051SYingwei Zheng; CHECK-NEXT:      i32 1, label [[SW_BB]]
73*1259c051SYingwei Zheng; CHECK-NEXT:      i32 -128, label [[SW_BB]]
74*1259c051SYingwei Zheng; CHECK-NEXT:    ]
75*1259c051SYingwei Zheng; CHECK:       sw.bb:
76*1259c051SYingwei Zheng; CHECK-NEXT:    ret i1 true
77*1259c051SYingwei Zheng; CHECK:       sw.default:
78*1259c051SYingwei Zheng; CHECK-NEXT:    ret i1 false
79*1259c051SYingwei Zheng;
80*1259c051SYingwei Zhengentry:
81*1259c051SYingwei Zheng  %b = shl nsw i32 %a, 24
82*1259c051SYingwei Zheng  call void @use(i32 %b)
83*1259c051SYingwei Zheng  switch i32 %b, label %sw.default [
84*1259c051SYingwei Zheng  i32 0, label %sw.bb
85*1259c051SYingwei Zheng  i32 16777216, label %sw.bb
86*1259c051SYingwei Zheng  i32 2147483648, label %sw.bb
87*1259c051SYingwei Zheng  ]
88*1259c051SYingwei Zheng
89*1259c051SYingwei Zhengsw.bb:
90*1259c051SYingwei Zheng  ret i1 true
91*1259c051SYingwei Zhengsw.default:
92*1259c051SYingwei Zheng  ret i1 false
93*1259c051SYingwei Zheng}
94*1259c051SYingwei Zheng
95*1259c051SYingwei Zheng; Negative tests
96*1259c051SYingwei Zheng
97*1259c051SYingwei Zhengdefine i1 @test_switch_with_shl_mask_multiuse(i32 %a) {
98*1259c051SYingwei Zheng; CHECK-LABEL: define i1 @test_switch_with_shl_mask_multiuse(
99*1259c051SYingwei Zheng; CHECK-SAME: i32 [[A:%.*]]) {
100*1259c051SYingwei Zheng; CHECK-NEXT:  entry:
101*1259c051SYingwei Zheng; CHECK-NEXT:    [[B:%.*]] = shl i32 [[A]], 24
102*1259c051SYingwei Zheng; CHECK-NEXT:    call void @use(i32 [[B]])
103*1259c051SYingwei Zheng; CHECK-NEXT:    switch i32 [[B]], label [[SW_DEFAULT:%.*]] [
104*1259c051SYingwei Zheng; CHECK-NEXT:      i32 0, label [[SW_BB:%.*]]
105*1259c051SYingwei Zheng; CHECK-NEXT:      i32 16777216, label [[SW_BB]]
106*1259c051SYingwei Zheng; CHECK-NEXT:      i32 -2147483648, label [[SW_BB]]
107*1259c051SYingwei Zheng; CHECK-NEXT:    ]
108*1259c051SYingwei Zheng; CHECK:       sw.bb:
109*1259c051SYingwei Zheng; CHECK-NEXT:    ret i1 true
110*1259c051SYingwei Zheng; CHECK:       sw.default:
111*1259c051SYingwei Zheng; CHECK-NEXT:    ret i1 false
112*1259c051SYingwei Zheng;
113*1259c051SYingwei Zhengentry:
114*1259c051SYingwei Zheng  %b = shl i32 %a, 24
115*1259c051SYingwei Zheng  call void @use(i32 %b)
116*1259c051SYingwei Zheng  switch i32 %b, label %sw.default [
117*1259c051SYingwei Zheng  i32 0, label %sw.bb
118*1259c051SYingwei Zheng  i32 16777216, label %sw.bb
119*1259c051SYingwei Zheng  i32 2147483648, label %sw.bb
120*1259c051SYingwei Zheng  ]
121*1259c051SYingwei Zheng
122*1259c051SYingwei Zhengsw.bb:
123*1259c051SYingwei Zheng  ret i1 true
124*1259c051SYingwei Zhengsw.default:
125*1259c051SYingwei Zheng  ret i1 false
126*1259c051SYingwei Zheng}
127*1259c051SYingwei Zheng
128*1259c051SYingwei Zhengdefine i1 @test_switch_with_shl_mask_unknown_shamt(i32 %a, i32 %shamt) {
129*1259c051SYingwei Zheng; CHECK-LABEL: define i1 @test_switch_with_shl_mask_unknown_shamt(
130*1259c051SYingwei Zheng; CHECK-SAME: i32 [[A:%.*]], i32 [[SHAMT:%.*]]) {
131*1259c051SYingwei Zheng; CHECK-NEXT:  entry:
132*1259c051SYingwei Zheng; CHECK-NEXT:    [[B:%.*]] = shl i32 [[A]], [[SHAMT]]
133*1259c051SYingwei Zheng; CHECK-NEXT:    switch i32 [[B]], label [[SW_DEFAULT:%.*]] [
134*1259c051SYingwei Zheng; CHECK-NEXT:      i32 0, label [[SW_BB:%.*]]
135*1259c051SYingwei Zheng; CHECK-NEXT:      i32 16777216, label [[SW_BB]]
136*1259c051SYingwei Zheng; CHECK-NEXT:      i32 -2147483648, label [[SW_BB]]
137*1259c051SYingwei Zheng; CHECK-NEXT:    ]
138*1259c051SYingwei Zheng; CHECK:       sw.bb:
139*1259c051SYingwei Zheng; CHECK-NEXT:    ret i1 true
140*1259c051SYingwei Zheng; CHECK:       sw.default:
141*1259c051SYingwei Zheng; CHECK-NEXT:    ret i1 false
142*1259c051SYingwei Zheng;
143*1259c051SYingwei Zhengentry:
144*1259c051SYingwei Zheng  %b = shl i32 %a, %shamt
145*1259c051SYingwei Zheng  switch i32 %b, label %sw.default [
146*1259c051SYingwei Zheng  i32 0, label %sw.bb
147*1259c051SYingwei Zheng  i32 16777216, label %sw.bb
148*1259c051SYingwei Zheng  i32 2147483648, label %sw.bb
149*1259c051SYingwei Zheng  ]
150*1259c051SYingwei Zheng
151*1259c051SYingwei Zhengsw.bb:
152*1259c051SYingwei Zheng  ret i1 true
153*1259c051SYingwei Zhengsw.default:
154*1259c051SYingwei Zheng  ret i1 false
155*1259c051SYingwei Zheng}
156*1259c051SYingwei Zheng
157*1259c051SYingwei Zhengdefine i1 @test_switch_with_shl_mask_poison(i32 %a) {
158*1259c051SYingwei Zheng; CHECK-LABEL: define i1 @test_switch_with_shl_mask_poison(
159*1259c051SYingwei Zheng; CHECK-SAME: i32 [[A:%.*]]) {
160*1259c051SYingwei Zheng; CHECK-NEXT:  entry:
161*1259c051SYingwei Zheng; CHECK-NEXT:    switch i32 poison, label [[SW_DEFAULT:%.*]] [
162*1259c051SYingwei Zheng; CHECK-NEXT:      i32 0, label [[SW_BB:%.*]]
163*1259c051SYingwei Zheng; CHECK-NEXT:      i32 16777216, label [[SW_BB]]
164*1259c051SYingwei Zheng; CHECK-NEXT:      i32 -2147483648, label [[SW_BB]]
165*1259c051SYingwei Zheng; CHECK-NEXT:    ]
166*1259c051SYingwei Zheng; CHECK:       sw.bb:
167*1259c051SYingwei Zheng; CHECK-NEXT:    ret i1 true
168*1259c051SYingwei Zheng; CHECK:       sw.default:
169*1259c051SYingwei Zheng; CHECK-NEXT:    ret i1 false
170*1259c051SYingwei Zheng;
171*1259c051SYingwei Zhengentry:
172*1259c051SYingwei Zheng  %b = shl i32 %a, 32
173*1259c051SYingwei Zheng  switch i32 %b, label %sw.default [
174*1259c051SYingwei Zheng  i32 0, label %sw.bb
175*1259c051SYingwei Zheng  i32 16777216, label %sw.bb
176*1259c051SYingwei Zheng  i32 2147483648, label %sw.bb
177*1259c051SYingwei Zheng  ]
178*1259c051SYingwei Zheng
179*1259c051SYingwei Zhengsw.bb:
180*1259c051SYingwei Zheng  ret i1 true
181*1259c051SYingwei Zhengsw.default:
182*1259c051SYingwei Zheng  ret i1 false
183*1259c051SYingwei Zheng}
184*1259c051SYingwei Zheng
185*1259c051SYingwei Zhengdeclare void @use(i32)
186