xref: /llvm-project/llvm/test/Transforms/InstCombine/pr72433.ll (revision 03d4a9d94da30590ebfc444cf13a8763f47b7bb9)
12fbd0885SCraig Topper; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
22fbd0885SCraig Topper; RUN: opt -passes=instcombine -S < %s | FileCheck %s
32fbd0885SCraig Topper
42fbd0885SCraig Topperdefine i32 @widget(i32 %arg, i32 %arg1) {
52fbd0885SCraig Topper; CHECK-LABEL: define i32 @widget(
62fbd0885SCraig Topper; CHECK-SAME: i32 [[ARG:%.*]], i32 [[ARG1:%.*]]) {
72fbd0885SCraig Topper; CHECK-NEXT:  bb:
82fbd0885SCraig Topper; CHECK-NEXT:    [[ICMP:%.*]] = icmp ne i32 [[ARG]], 0
92fbd0885SCraig Topper; CHECK-NEXT:    [[TMP0:%.*]] = zext i1 [[ICMP]] to i32
102fbd0885SCraig Topper; CHECK-NEXT:    [[MUL:%.*]] = shl nuw nsw i32 20, [[TMP0]]
112fbd0885SCraig Topper; CHECK-NEXT:    [[XOR:%.*]] = zext i1 [[ICMP]] to i32
12*03d4a9d9SCraig Topper; CHECK-NEXT:    [[ADD9:%.*]] = or disjoint i32 [[MUL]], [[XOR]]
132fbd0885SCraig Topper; CHECK-NEXT:    [[TMP1:%.*]] = zext i1 [[ICMP]] to i32
142fbd0885SCraig Topper; CHECK-NEXT:    [[MUL2:%.*]] = shl nuw nsw i32 [[ADD9]], [[TMP1]]
152fbd0885SCraig Topper; CHECK-NEXT:    ret i32 [[MUL2]]
162fbd0885SCraig Topper;
172fbd0885SCraig Topperbb:
182fbd0885SCraig Topper  %icmp = icmp eq i32 %arg, 0
192fbd0885SCraig Topper  %zext = zext i1 %icmp to i32
202fbd0885SCraig Topper  %sub = sub i32 2, %zext
212fbd0885SCraig Topper  %mul = mul i32 20, %sub
222fbd0885SCraig Topper  %zext8 = zext i1 %icmp to i32
232fbd0885SCraig Topper  %xor = xor i32 %zext8, 1
242fbd0885SCraig Topper  %add9 = add i32 %mul, %xor
252fbd0885SCraig Topper  %mul2 = mul i32 %add9, %sub
262fbd0885SCraig Topper  ret i32 %mul2
272fbd0885SCraig Topper}
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