1*09afe415SCaroline Concatto; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2*09afe415SCaroline Concatto; RUN: opt -S -passes=instcombine < %s | FileCheck %s 3*09afe415SCaroline Concatto 4*09afe415SCaroline Concatto; Check that the redundant sequences of extract/insert are eliminated. 5*09afe415SCaroline Concatto 6*09afe415SCaroline Concatto; extract.vector(insert.vector(Tuple, Value, Idx), Idx) --> Value 7*09afe415SCaroline Concattodefine <vscale x 16 x i8> @test_extract_insert_same_idx(<vscale x 64 x i8> %v0, <vscale x 16 x i8> %v1) { 8*09afe415SCaroline Concatto; CHECK-LABEL: @test_extract_insert_same_idx( 9*09afe415SCaroline Concatto; CHECK-NEXT: ret <vscale x 16 x i8> [[V1:%.*]] 10*09afe415SCaroline Concatto; 11*09afe415SCaroline Concatto %vec.ins = call <vscale x 64 x i8> @llvm.vector.insert.nxv64i8.nxv16i8(<vscale x 64 x i8> %v0, <vscale x 16 x i8> %v1, i64 48) 12*09afe415SCaroline Concatto %vec.ext = call <vscale x 16 x i8> @llvm.vector.extract.nxv16i8.nxv64i8(<vscale x 64 x i8> %vec.ins, i64 48) 13*09afe415SCaroline Concatto ret <vscale x 16 x i8> %vec.ext 14*09afe415SCaroline Concatto} 15*09afe415SCaroline Concatto 16*09afe415SCaroline Concatto; extract.vector(insert.vector(Vector, Value, InsertIndex), ExtractIndex) 17*09afe415SCaroline Concatto; --> extract.vector(Vector, ExtractIndex) 18*09afe415SCaroline Concattodefine <vscale x 16 x i8> @test_extract_insert_dif_idx(<vscale x 64 x i8> %v0, <vscale x 16 x i8> %v1) { 19*09afe415SCaroline Concatto; CHECK-LABEL: @test_extract_insert_dif_idx( 20*09afe415SCaroline Concatto; CHECK-NEXT: [[VEC_EXT:%.*]] = call <vscale x 16 x i8> @llvm.vector.extract.nxv16i8.nxv64i8(<vscale x 64 x i8> [[V0:%.*]], i64 0) 21*09afe415SCaroline Concatto; CHECK-NEXT: ret <vscale x 16 x i8> [[VEC_EXT]] 22*09afe415SCaroline Concatto; 23*09afe415SCaroline Concatto %vec.ins = call <vscale x 64 x i8> @llvm.vector.insert.nxv64i8.nxv16i8(<vscale x 64 x i8> %v0, <vscale x 16 x i8> %v1, i64 48) 24*09afe415SCaroline Concatto %vec.ext = call <vscale x 16 x i8> @llvm.vector.extract.nxv16i8.nxv64i8(<vscale x 64 x i8> %vec.ins, i64 0) 25*09afe415SCaroline Concatto ret <vscale x 16 x i8> %vec.ext 26*09afe415SCaroline Concatto} 27*09afe415SCaroline Concatto 28*09afe415SCaroline Concatto; Negative test 29*09afe415SCaroline Concatto; The extracted vector-size != inserted vector-size 30*09afe415SCaroline Concattodefine <vscale x 32 x i8> @neg_test_extract_insert_same_idx_dif_ret_size(<vscale x 64 x i8> %v0, <vscale x 16 x i8> %v1) { 31*09afe415SCaroline Concatto; CHECK-LABEL: @neg_test_extract_insert_same_idx_dif_ret_size( 32*09afe415SCaroline Concatto; CHECK-NEXT: [[VEC_INS:%.*]] = call <vscale x 64 x i8> @llvm.vector.insert.nxv64i8.nxv16i8(<vscale x 64 x i8> [[V0:%.*]], <vscale x 16 x i8> [[V1:%.*]], i64 32) 33*09afe415SCaroline Concatto; CHECK-NEXT: [[VEC_EXT:%.*]] = call <vscale x 32 x i8> @llvm.vector.extract.nxv32i8.nxv64i8(<vscale x 64 x i8> [[VEC_INS]], i64 32) 34*09afe415SCaroline Concatto; CHECK-NEXT: ret <vscale x 32 x i8> [[VEC_EXT]] 35*09afe415SCaroline Concatto; 36*09afe415SCaroline Concatto %vec.ins = call <vscale x 64 x i8> @llvm.vector.insert.nxv64i8.nxv16i8(<vscale x 64 x i8> %v0, <vscale x 16 x i8> %v1, i64 32) 37*09afe415SCaroline Concatto %vec.ext = call <vscale x 32 x i8> @llvm.vector.extract.nxv32i8.nxv64i8(<vscale x 64 x i8> %vec.ins, i64 32) 38*09afe415SCaroline Concatto ret <vscale x 32 x i8> %vec.ext 39*09afe415SCaroline Concatto} 40*09afe415SCaroline Concatto 41*09afe415SCaroline Concatto 42*09afe415SCaroline Concattodeclare <vscale x 64 x i8> @llvm.vector.insert.nxv64i8.nxv16i8(<vscale x 64 x i8>, <vscale x 16 x i8>, i64) 43*09afe415SCaroline Concattodeclare <vscale x 16 x i8> @llvm.vector.extract.nxv16i8.nxv64i8(<vscale x 64 x i8>, i64) 44*09afe415SCaroline Concattodeclare <vscale x 32 x i8> @llvm.vector.extract.nxv32i8.nxv64i8(<vscale x 64 x i8>, i64) 45