1*d309261dSNashe Mncube; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 2*d309261dSNashe Mncube; RUN: opt -passes=instcombine -S %s | FileCheck %s 3*d309261dSNashe Mncube 4*d309261dSNashe Mncubedefine double @F0(bfloat %P0) { 5*d309261dSNashe Mncube; CHECK-LABEL: define double @F0( 6*d309261dSNashe Mncube; CHECK-SAME: bfloat [[P0:%.*]]) { 7*d309261dSNashe Mncube; CHECK-NEXT: entry: 8*d309261dSNashe Mncube; CHECK-NEXT: [[CONV0:%.*]] = bitcast bfloat [[P0]] to half 9*d309261dSNashe Mncube; CHECK-NEXT: [[TMP0:%.*]] = fpext half [[CONV0]] to double 10*d309261dSNashe Mncube; CHECK-NEXT: ret double [[TMP0]] 11*d309261dSNashe Mncube; 12*d309261dSNashe Mncubeentry: 13*d309261dSNashe Mncube %conv0 = bitcast bfloat %P0 to half 14*d309261dSNashe Mncube %0 = fpext half %conv0 to double 15*d309261dSNashe Mncube ret double %0 16*d309261dSNashe Mncube} 17*d309261dSNashe Mncube 18*d309261dSNashe Mncubedefine double @F1(half %P1) { 19*d309261dSNashe Mncube; CHECK-LABEL: define double @F1( 20*d309261dSNashe Mncube; CHECK-SAME: half [[P1:%.*]]) { 21*d309261dSNashe Mncube; CHECK-NEXT: entry: 22*d309261dSNashe Mncube; CHECK-NEXT: [[CONV1:%.*]] = bitcast half [[P1]] to bfloat 23*d309261dSNashe Mncube; CHECK-NEXT: [[TMP0:%.*]] = fpext bfloat [[CONV1]] to double 24*d309261dSNashe Mncube; CHECK-NEXT: ret double [[TMP0]] 25*d309261dSNashe Mncube; 26*d309261dSNashe Mncubeentry: 27*d309261dSNashe Mncube %conv1 = bitcast half %P1 to bfloat 28*d309261dSNashe Mncube %0 = fpext bfloat %conv1 to double 29*d309261dSNashe Mncube ret double %0 30*d309261dSNashe Mncube} 31*d309261dSNashe Mncube 32*d309261dSNashe Mncubedefine i32 @F2(bfloat %P2) { 33*d309261dSNashe Mncube; CHECK-LABEL: define i32 @F2( 34*d309261dSNashe Mncube; CHECK-SAME: bfloat [[P2:%.*]]) { 35*d309261dSNashe Mncube; CHECK-NEXT: entry: 36*d309261dSNashe Mncube; CHECK-NEXT: [[CONV2:%.*]] = bitcast bfloat [[P2]] to half 37*d309261dSNashe Mncube; CHECK-NEXT: [[TMP0:%.*]] = fptoui half [[CONV2]] to i32 38*d309261dSNashe Mncube; CHECK-NEXT: ret i32 [[TMP0]] 39*d309261dSNashe Mncube; 40*d309261dSNashe Mncubeentry: 41*d309261dSNashe Mncube %conv2 = bitcast bfloat %P2 to half 42*d309261dSNashe Mncube %0 = fptoui half %conv2 to i32 43*d309261dSNashe Mncube ret i32 %0 44*d309261dSNashe Mncube} 45*d309261dSNashe Mncube 46*d309261dSNashe Mncubedefine i32 @F3(half %P3) { 47*d309261dSNashe Mncube; CHECK-LABEL: define i32 @F3( 48*d309261dSNashe Mncube; CHECK-SAME: half [[P3:%.*]]) { 49*d309261dSNashe Mncube; CHECK-NEXT: entry: 50*d309261dSNashe Mncube; CHECK-NEXT: [[CONV3:%.*]] = bitcast half [[P3]] to bfloat 51*d309261dSNashe Mncube; CHECK-NEXT: [[TMP0:%.*]] = fptoui bfloat [[CONV3]] to i32 52*d309261dSNashe Mncube; CHECK-NEXT: ret i32 [[TMP0]] 53*d309261dSNashe Mncube; 54*d309261dSNashe Mncubeentry: 55*d309261dSNashe Mncube %conv3 = bitcast half %P3 to bfloat 56*d309261dSNashe Mncube %0 = fptoui bfloat %conv3 to i32 57*d309261dSNashe Mncube ret i32 %0 58*d309261dSNashe Mncube} 59*d309261dSNashe Mncube 60*d309261dSNashe Mncubedefine i32 @F4(bfloat %P4) { 61*d309261dSNashe Mncube; CHECK-LABEL: define i32 @F4( 62*d309261dSNashe Mncube; CHECK-SAME: bfloat [[P4:%.*]]) { 63*d309261dSNashe Mncube; CHECK-NEXT: entry: 64*d309261dSNashe Mncube; CHECK-NEXT: [[CONV4:%.*]] = bitcast bfloat [[P4]] to half 65*d309261dSNashe Mncube; CHECK-NEXT: [[TMP0:%.*]] = fptosi half [[CONV4]] to i32 66*d309261dSNashe Mncube; CHECK-NEXT: ret i32 [[TMP0]] 67*d309261dSNashe Mncube; 68*d309261dSNashe Mncubeentry: 69*d309261dSNashe Mncube %conv4 = bitcast bfloat %P4 to half 70*d309261dSNashe Mncube %0 = fptosi half %conv4 to i32 71*d309261dSNashe Mncube ret i32 %0 72*d309261dSNashe Mncube} 73*d309261dSNashe Mncube 74*d309261dSNashe Mncubedefine i32 @F5(half %P5) { 75*d309261dSNashe Mncube; CHECK-LABEL: define i32 @F5( 76*d309261dSNashe Mncube; CHECK-SAME: half [[P5:%.*]]) { 77*d309261dSNashe Mncube; CHECK-NEXT: entry: 78*d309261dSNashe Mncube; CHECK-NEXT: [[CONV5:%.*]] = bitcast half [[P5]] to bfloat 79*d309261dSNashe Mncube; CHECK-NEXT: [[TMP0:%.*]] = fptosi bfloat [[CONV5]] to i32 80*d309261dSNashe Mncube; CHECK-NEXT: ret i32 [[TMP0]] 81*d309261dSNashe Mncube; 82*d309261dSNashe Mncubeentry: 83*d309261dSNashe Mncube %conv5 = bitcast half %P5 to bfloat 84*d309261dSNashe Mncube %0 = fptosi bfloat %conv5 to i32 85*d309261dSNashe Mncube ret i32 %0 86*d309261dSNashe Mncube} 87*d309261dSNashe Mncube 88