xref: /llvm-project/llvm/test/Transforms/InstCombine/apint-shift.ll (revision 421c02e5c6b376fbbd8cc61c20feb35f1cee7a5a)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -instcombine -S | FileCheck %s
3
4define i55 @test6(i55 %A) {
5; CHECK-LABEL: @test6(
6; CHECK-NEXT:    [[C:%.*]] = mul i55 [[A:%.*]], 6
7; CHECK-NEXT:    ret i55 [[C]]
8;
9  %B = shl i55 %A, 1
10  %C = mul i55 %B, 3
11  ret i55 %C
12}
13
14; (X * C2) << C1 --> X * (C2 << C1)
15
16define i55 @test6a(i55 %A) {
17; CHECK-LABEL: @test6a(
18; CHECK-NEXT:    [[C:%.*]] = mul i55 [[A:%.*]], 6
19; CHECK-NEXT:    ret i55 [[C]]
20;
21  %B = mul i55 %A, 3
22  %C = shl i55 %B, 1
23  ret i55 %C
24}
25
26; (X * C2) << C1 --> X * (C2 << C1)
27
28define <2 x i55> @test6a_vec(<2 x i55> %A) {
29; CHECK-LABEL: @test6a_vec(
30; CHECK-NEXT:    [[C:%.*]] = mul <2 x i55> [[A:%.*]], <i55 6, i55 48>
31; CHECK-NEXT:    ret <2 x i55> [[C]]
32;
33  %B = mul <2 x i55> %A, <i55 3, i55 12>
34  %C = shl <2 x i55> %B, <i55 1, i55 2>
35  ret <2 x i55> %C
36}
37
38define i29 @test7(i8 %X) {
39; CHECK-LABEL: @test7(
40; CHECK-NEXT:    ret i29 -1
41;
42  %A = zext i8 %X to i29
43  %B = ashr i29 -1, %A
44  ret i29 %B
45}
46
47define i7 @test8(i7 %A) {
48; CHECK-LABEL: @test8(
49; CHECK-NEXT:    ret i7 0
50;
51  %B = shl i7 %A, 4
52  %C = shl i7 %B, 3
53  ret i7 %C
54}
55
56define i17 @test9(i17 %A) {
57; CHECK-LABEL: @test9(
58; CHECK-NEXT:    [[B:%.*]] = and i17 [[A:%.*]], 1
59; CHECK-NEXT:    ret i17 [[B]]
60;
61  %B = shl i17 %A, 16
62  %C = lshr i17 %B, 16
63  ret i17 %C
64}
65
66; shl (lshr X, C), C --> and X, C'
67
68define i19 @test10(i19 %X) {
69; CHECK-LABEL: @test10(
70; CHECK-NEXT:    [[SH1:%.*]] = and i19 [[X:%.*]], -262144
71; CHECK-NEXT:    ret i19 [[SH1]]
72;
73  %sh1 = lshr i19 %X, 18
74  %sh2 = shl i19 %sh1, 18
75  ret i19 %sh2
76}
77
78; Two right shifts in the same direction:
79; lshr (lshr X, C1), C2 --> lshr X, C1 + C2
80
81define <2 x i19> @lshr_lshr_splat_vec(<2 x i19> %X) {
82; CHECK-LABEL: @lshr_lshr_splat_vec(
83; CHECK-NEXT:    [[SH1:%.*]] = lshr <2 x i19> [[X:%.*]], <i19 5, i19 5>
84; CHECK-NEXT:    ret <2 x i19> [[SH1]]
85;
86  %sh1 = lshr <2 x i19> %X, <i19 3, i19 3>
87  %sh2 = lshr <2 x i19> %sh1, <i19 2, i19 2>
88  ret <2 x i19> %sh2
89}
90
91define i9 @multiuse_lshr_lshr(i9 %x) {
92; CHECK-LABEL: @multiuse_lshr_lshr(
93; CHECK-NEXT:    [[SH1:%.*]] = lshr i9 [[X:%.*]], 2
94; CHECK-NEXT:    [[SH2:%.*]] = lshr i9 [[X]], 5
95; CHECK-NEXT:    [[MUL:%.*]] = mul i9 [[SH1]], [[SH2]]
96; CHECK-NEXT:    ret i9 [[MUL]]
97;
98  %sh1 = lshr i9 %x, 2
99  %sh2 = lshr i9 %sh1, 3
100  %mul = mul i9 %sh1, %sh2
101  ret i9 %mul
102}
103
104define <2 x i9> @multiuse_lshr_lshr_splat(<2 x i9> %x) {
105; CHECK-LABEL: @multiuse_lshr_lshr_splat(
106; CHECK-NEXT:    [[SH1:%.*]] = lshr <2 x i9> [[X:%.*]], <i9 2, i9 2>
107; CHECK-NEXT:    [[SH2:%.*]] = lshr <2 x i9> [[X]], <i9 5, i9 5>
108; CHECK-NEXT:    [[MUL:%.*]] = mul <2 x i9> [[SH1]], [[SH2]]
109; CHECK-NEXT:    ret <2 x i9> [[MUL]]
110;
111  %sh1 = lshr <2 x i9> %x, <i9 2, i9 2>
112  %sh2 = lshr <2 x i9> %sh1, <i9 3, i9 3>
113  %mul = mul <2 x i9> %sh1, %sh2
114  ret <2 x i9> %mul
115}
116
117; Two left shifts in the same direction:
118; shl (shl X, C1), C2 -->  shl X, C1 + C2
119
120define <2 x i19> @shl_shl_splat_vec(<2 x i19> %X) {
121; CHECK-LABEL: @shl_shl_splat_vec(
122; CHECK-NEXT:    [[SH1:%.*]] = shl <2 x i19> [[X:%.*]], <i19 5, i19 5>
123; CHECK-NEXT:    ret <2 x i19> [[SH1]]
124;
125  %sh1 = shl <2 x i19> %X, <i19 3, i19 3>
126  %sh2 = shl <2 x i19> %sh1, <i19 2, i19 2>
127  ret <2 x i19> %sh2
128}
129
130define i42 @multiuse_shl_shl(i42 %x) {
131; CHECK-LABEL: @multiuse_shl_shl(
132; CHECK-NEXT:    [[SH1:%.*]] = shl i42 [[X:%.*]], 8
133; CHECK-NEXT:    [[SH2:%.*]] = shl i42 [[X]], 17
134; CHECK-NEXT:    [[MUL:%.*]] = mul i42 [[SH1]], [[SH2]]
135; CHECK-NEXT:    ret i42 [[MUL]]
136;
137  %sh1 = shl i42 %x, 8
138  %sh2 = shl i42 %sh1, 9
139  %mul = mul i42 %sh1, %sh2
140  ret i42 %mul
141}
142
143define <2 x i42> @multiuse_shl_shl_splat(<2 x i42> %x) {
144; CHECK-LABEL: @multiuse_shl_shl_splat(
145; CHECK-NEXT:    [[SH1:%.*]] = shl <2 x i42> [[X:%.*]], <i42 8, i42 8>
146; CHECK-NEXT:    [[SH2:%.*]] = shl <2 x i42> [[X]], <i42 17, i42 17>
147; CHECK-NEXT:    [[MUL:%.*]] = mul <2 x i42> [[SH1]], [[SH2]]
148; CHECK-NEXT:    ret <2 x i42> [[MUL]]
149;
150  %sh1 = shl <2 x i42> %x, <i42 8, i42 8>
151  %sh2 = shl <2 x i42> %sh1, <i42 9, i42 9>
152  %mul = mul <2 x i42> %sh1, %sh2
153  ret <2 x i42> %mul
154}
155
156; Equal shift amounts in opposite directions become bitwise 'and':
157; lshr (shl X, C), C --> and X, C'
158
159define <2 x i19> @eq_shl_lshr_splat_vec(<2 x i19> %X) {
160; CHECK-LABEL: @eq_shl_lshr_splat_vec(
161; CHECK-NEXT:    [[SH1:%.*]] = and <2 x i19> [[X:%.*]], <i19 65535, i19 65535>
162; CHECK-NEXT:    ret <2 x i19> [[SH1]]
163;
164  %sh1 = shl <2 x i19> %X, <i19 3, i19 3>
165  %sh2 = lshr <2 x i19> %sh1, <i19 3, i19 3>
166  ret <2 x i19> %sh2
167}
168
169; Equal shift amounts in opposite directions become bitwise 'and':
170; shl (lshr X, C), C --> and X, C'
171
172define <2 x i19> @eq_lshr_shl_splat_vec(<2 x i19> %X) {
173; CHECK-LABEL: @eq_lshr_shl_splat_vec(
174; CHECK-NEXT:    [[SH1:%.*]] = and <2 x i19> [[X:%.*]], <i19 -8, i19 -8>
175; CHECK-NEXT:    ret <2 x i19> [[SH1]]
176;
177  %sh1 = lshr <2 x i19> %X, <i19 3, i19 3>
178  %sh2 = shl <2 x i19> %sh1, <i19 3, i19 3>
179  ret <2 x i19> %sh2
180}
181
182; In general, we would need an 'and' for this transform, but the masked-off bits are known zero.
183; shl (lshr X, C1), C2 --> lshr X, C1 - C2
184
185define <2 x i7> @lshr_shl_splat_vec(<2 x i7> %X) {
186; CHECK-LABEL: @lshr_shl_splat_vec(
187; CHECK-NEXT:    [[MUL:%.*]] = mul <2 x i7> [[X:%.*]], <i7 -8, i7 -8>
188; CHECK-NEXT:    [[SH1:%.*]] = lshr exact <2 x i7> [[MUL]], <i7 1, i7 1>
189; CHECK-NEXT:    ret <2 x i7> [[SH1]]
190;
191  %mul = mul <2 x i7> %X, <i7 -8, i7 -8>
192  %sh1 = lshr exact <2 x i7> %mul, <i7 3, i7 3>
193  %sh2 = shl nuw nsw <2 x i7> %sh1, <i7 2, i7 2>
194  ret <2 x i7> %sh2
195}
196
197; In general, we would need an 'and' for this transform, but the masked-off bits are known zero.
198; lshr (shl X, C1), C2 -->  shl X, C1 - C2
199
200define <2 x i7> @shl_lshr_splat_vec(<2 x i7> %X) {
201; CHECK-LABEL: @shl_lshr_splat_vec(
202; CHECK-NEXT:    [[DIV:%.*]] = udiv <2 x i7> [[X:%.*]], <i7 9, i7 9>
203; CHECK-NEXT:    [[SH1:%.*]] = shl nuw nsw <2 x i7> [[DIV]], <i7 1, i7 1>
204; CHECK-NEXT:    ret <2 x i7> [[SH1]]
205;
206  %div = udiv <2 x i7> %X, <i7 9, i7 9>
207  %sh1 = shl nuw <2 x i7> %div, <i7 3, i7 3>
208  %sh2 = lshr exact <2 x i7> %sh1, <i7 2, i7 2>
209  ret <2 x i7> %sh2
210}
211
212; Don't hide the shl from scalar evolution. DAGCombine will get it.
213
214define i23 @test11(i23 %x) {
215; CHECK-LABEL: @test11(
216; CHECK-NEXT:    [[A:%.*]] = mul i23 [[X:%.*]], 3
217; CHECK-NEXT:    [[B:%.*]] = lshr i23 [[A]], 11
218; CHECK-NEXT:    [[C:%.*]] = shl i23 [[B]], 12
219; CHECK-NEXT:    ret i23 [[C]]
220;
221  %a = mul i23 %x, 3
222  %b = lshr i23 %a, 11
223  %c = shl i23 %b, 12
224  ret i23 %c
225}
226
227; shl (ashr X, C), C --> and X, C'
228
229define i47 @test12(i47 %X) {
230; CHECK-LABEL: @test12(
231; CHECK-NEXT:    [[TMP1:%.*]] = and i47 [[X:%.*]], -256
232; CHECK-NEXT:    ret i47 [[TMP1]]
233;
234  %sh1 = ashr i47 %X, 8
235  %sh2 = shl i47 %sh1, 8
236  ret i47 %sh2
237}
238
239define <2 x i47> @test12_splat_vec(<2 x i47> %X) {
240; CHECK-LABEL: @test12_splat_vec(
241; CHECK-NEXT:    [[TMP1:%.*]] = and <2 x i47> [[X:%.*]], <i47 -256, i47 -256>
242; CHECK-NEXT:    ret <2 x i47> [[TMP1]]
243;
244  %sh1 = ashr <2 x i47> %X, <i47 8, i47 8>
245  %sh2 = shl <2 x i47> %sh1, <i47 8, i47 8>
246  ret <2 x i47> %sh2
247}
248
249; Don't hide the shl from scalar evolution. DAGCombine will get it.
250
251define i18 @test13(i18 %x) {
252; CHECK-LABEL: @test13(
253; CHECK-NEXT:    [[A:%.*]] = mul i18 [[X:%.*]], 3
254; CHECK-NEXT:    [[TMP1:%.*]] = lshr i18 [[A]], 8
255; CHECK-NEXT:    [[C:%.*]] = shl i18 [[TMP1]], 9
256; CHECK-NEXT:    ret i18 [[C]]
257;
258  %a = mul i18 %x, 3
259  %b = ashr i18 %a, 8
260  %c = shl i18 %b, 9
261  ret i18 %c
262}
263
264define i35 @test14(i35 %A) {
265; CHECK-LABEL: @test14(
266; CHECK-NEXT:    [[B:%.*]] = and i35 [[A:%.*]], -19760
267; CHECK-NEXT:    [[C:%.*]] = or i35 [[B]], 19744
268; CHECK-NEXT:    ret i35 [[C]]
269;
270  %B = lshr i35 %A, 4
271  %C = or i35 %B, 1234
272  %D = shl i35 %C, 4
273  ret i35 %D
274}
275
276define i79 @test14a(i79 %A) {
277; CHECK-LABEL: @test14a(
278; CHECK-NEXT:    [[C:%.*]] = and i79 [[A:%.*]], 77
279; CHECK-NEXT:    ret i79 [[C]]
280;
281  %B = shl i79 %A, 4
282  %C = and i79 %B, 1234
283  %D = lshr i79 %C, 4
284  ret i79 %D
285}
286
287define i45 @test15(i1 %C) {
288; CHECK-LABEL: @test15(
289; CHECK-NEXT:    [[A:%.*]] = select i1 [[C:%.*]], i45 12, i45 4
290; CHECK-NEXT:    ret i45 [[A]]
291;
292  %A = select i1 %C, i45 3, i45 1
293  %V = shl i45 %A, 2
294  ret i45 %V
295}
296
297define i53 @test15a(i1 %X) {
298; CHECK-LABEL: @test15a(
299; CHECK-NEXT:    [[V:%.*]] = select i1 [[X:%.*]], i53 512, i53 128
300; CHECK-NEXT:    ret i53 [[V]]
301;
302  %A = select i1 %X, i8 3, i8 1
303  %B = zext i8 %A to i53
304  %V = shl i53 64, %B
305  ret i53 %V
306}
307
308define i1 @test16(i84 %X) {
309; CHECK-LABEL: @test16(
310; CHECK-NEXT:    [[TMP1:%.*]] = and i84 [[X:%.*]], 16
311; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i84 [[TMP1]], 0
312; CHECK-NEXT:    ret i1 [[CMP]]
313;
314  %shr = ashr i84 %X, 4
315  %and = and i84 %shr, 1
316  %cmp = icmp ne i84 %and, 0
317  ret i1 %cmp
318}
319
320define <2 x i1> @test16vec(<2 x i84> %X) {
321; CHECK-LABEL: @test16vec(
322; CHECK-NEXT:    [[TMP1:%.*]] = and <2 x i84> [[X:%.*]], <i84 16, i84 16>
323; CHECK-NEXT:    [[CMP:%.*]] = icmp ne <2 x i84> [[TMP1]], zeroinitializer
324; CHECK-NEXT:    ret <2 x i1> [[CMP]]
325;
326  %shr = ashr <2 x i84> %X, <i84 4, i84 4>
327  %and = and <2 x i84> %shr, <i84 1, i84 1>
328  %cmp = icmp ne <2 x i84> %and, zeroinitializer
329  ret <2 x i1> %cmp
330}
331
332define <2 x i1> @test16vec_nonuniform(<2 x i84> %X) {
333; CHECK-LABEL: @test16vec_nonuniform(
334; CHECK-NEXT:    [[SHR1:%.*]] = lshr <2 x i84> [[X:%.*]], <i84 4, i84 2>
335; CHECK-NEXT:    [[CMP:%.*]] = trunc <2 x i84> [[SHR1]] to <2 x i1>
336; CHECK-NEXT:    ret <2 x i1> [[CMP]]
337;
338  %shr = ashr <2 x i84> %X, <i84 4, i84 2>
339  %and = and <2 x i84> %shr, <i84 1, i84 1>
340  %cmp = icmp ne <2 x i84> %and, zeroinitializer
341  ret <2 x i1> %cmp
342}
343
344define i1 @test17(i106 %A) {
345; CHECK-LABEL: @test17(
346; CHECK-NEXT:    [[B_MASK:%.*]] = and i106 [[A:%.*]], -8
347; CHECK-NEXT:    [[C:%.*]] = icmp eq i106 [[B_MASK]], 9872
348; CHECK-NEXT:    ret i1 [[C]]
349;
350  %B = lshr i106 %A, 3
351  %C = icmp eq i106 %B, 1234
352  ret i1 %C
353}
354
355define <2 x i1> @test17vec(<2 x i106> %A) {
356; CHECK-LABEL: @test17vec(
357; CHECK-NEXT:    [[B_MASK:%.*]] = and <2 x i106> [[A:%.*]], <i106 -8, i106 -8>
358; CHECK-NEXT:    [[C:%.*]] = icmp eq <2 x i106> [[B_MASK]], <i106 9872, i106 9872>
359; CHECK-NEXT:    ret <2 x i1> [[C]]
360;
361  %B = lshr <2 x i106> %A, <i106 3, i106 3>
362  %C = icmp eq <2 x i106> %B, <i106 1234, i106 1234>
363  ret <2 x i1> %C
364}
365
366define i1 @test18(i11 %A) {
367; CHECK-LABEL: @test18(
368; CHECK-NEXT:    ret i1 false
369;
370  %B = lshr i11 %A, 10
371  %C = icmp eq i11 %B, 123
372  ret i1 %C
373}
374
375define i1 @test19(i37 %A) {
376; CHECK-LABEL: @test19(
377; CHECK-NEXT:    [[C:%.*]] = icmp ult i37 [[A:%.*]], 4
378; CHECK-NEXT:    ret i1 [[C]]
379;
380  %B = ashr i37 %A, 2
381  %C = icmp eq i37 %B, 0
382  ret i1 %C
383}
384
385define <2 x i1> @test19vec(<2 x i37> %A) {
386; CHECK-LABEL: @test19vec(
387; CHECK-NEXT:    [[C:%.*]] = icmp ult <2 x i37> [[A:%.*]], <i37 4, i37 4>
388; CHECK-NEXT:    ret <2 x i1> [[C]]
389;
390  %B = ashr <2 x i37> %A, <i37 2, i37 2>
391  %C = icmp eq <2 x i37> %B, zeroinitializer
392  ret <2 x i1> %C
393}
394
395define i1 @test19a(i39 %A) {
396; CHECK-LABEL: @test19a(
397; CHECK-NEXT:    [[C:%.*]] = icmp ugt i39 [[A:%.*]], -5
398; CHECK-NEXT:    ret i1 [[C]]
399;
400  %B = ashr i39 %A, 2
401  %C = icmp eq i39 %B, -1
402  ret i1 %C
403}
404
405define <2 x i1> @test19a_vec(<2 x i39> %A) {
406; CHECK-LABEL: @test19a_vec(
407; CHECK-NEXT:    [[C:%.*]] = icmp ugt <2 x i39> [[A:%.*]], <i39 -5, i39 -5>
408; CHECK-NEXT:    ret <2 x i1> [[C]]
409;
410  %B = ashr <2 x i39> %A, <i39 2, i39 2>
411  %C = icmp eq <2 x i39> %B, <i39 -1, i39 -1>
412  ret <2 x i1> %C
413}
414
415define i1 @test20(i13 %A) {
416; CHECK-LABEL: @test20(
417; CHECK-NEXT:    ret i1 false
418;
419  %B = ashr i13 %A, 12
420  %C = icmp eq i13 %B, 123
421  ret i1 %C
422}
423
424define i1 @test21(i12 %A) {
425; CHECK-LABEL: @test21(
426; CHECK-NEXT:    [[B_MASK:%.*]] = and i12 [[A:%.*]], 63
427; CHECK-NEXT:    [[C:%.*]] = icmp eq i12 [[B_MASK]], 62
428; CHECK-NEXT:    ret i1 [[C]]
429;
430  %B = shl i12 %A, 6
431  %C = icmp eq i12 %B, -128
432  ret i1 %C
433}
434
435define i1 @test22(i14 %A) {
436; CHECK-LABEL: @test22(
437; CHECK-NEXT:    [[B_MASK:%.*]] = and i14 [[A:%.*]], 127
438; CHECK-NEXT:    [[C:%.*]] = icmp eq i14 [[B_MASK]], 0
439; CHECK-NEXT:    ret i1 [[C]]
440;
441  %B = shl i14 %A, 7
442  %C = icmp eq i14 %B, 0
443  ret i1 %C
444}
445
446define i11 @test23(i44 %A) {
447; CHECK-LABEL: @test23(
448; CHECK-NEXT:    [[D:%.*]] = trunc i44 [[A:%.*]] to i11
449; CHECK-NEXT:    ret i11 [[D]]
450;
451  %B = shl i44 %A, 33
452  %C = ashr i44 %B, 33
453  %D = trunc i44 %C to i11
454  ret i11 %D
455}
456
457; Fold lshr (shl X, C), C -> and X, C' regardless of the number of uses of the shl.
458
459define i44 @shl_lshr_eq_amt_multi_use(i44 %A) {
460; CHECK-LABEL: @shl_lshr_eq_amt_multi_use(
461; CHECK-NEXT:    [[B:%.*]] = shl i44 [[A:%.*]], 33
462; CHECK-NEXT:    [[C:%.*]] = and i44 [[A]], 2047
463; CHECK-NEXT:    [[D:%.*]] = or i44 [[B]], [[C]]
464; CHECK-NEXT:    ret i44 [[D]]
465;
466  %B = shl i44 %A, 33
467  %C = lshr i44 %B, 33
468  %D = add i44 %B, %C
469  ret i44 %D
470}
471
472; Fold vector lshr (shl X, C), C -> and X, C' regardless of the number of uses of the shl.
473
474define <2 x i44> @shl_lshr_eq_amt_multi_use_splat_vec(<2 x i44> %A) {
475; CHECK-LABEL: @shl_lshr_eq_amt_multi_use_splat_vec(
476; CHECK-NEXT:    [[B:%.*]] = shl <2 x i44> [[A:%.*]], <i44 33, i44 33>
477; CHECK-NEXT:    [[C:%.*]] = and <2 x i44> [[A]], <i44 2047, i44 2047>
478; CHECK-NEXT:    [[D:%.*]] = or <2 x i44> [[B]], [[C]]
479; CHECK-NEXT:    ret <2 x i44> [[D]]
480;
481  %B = shl <2 x i44> %A, <i44 33, i44 33>
482  %C = lshr <2 x i44> %B, <i44 33, i44 33>
483  %D = add <2 x i44> %B, %C
484  ret <2 x i44> %D
485}
486
487; Fold shl (lshr X, C), C -> and X, C' regardless of the number of uses of the lshr.
488
489define i43 @lshr_shl_eq_amt_multi_use(i43 %A) {
490; CHECK-LABEL: @lshr_shl_eq_amt_multi_use(
491; CHECK-NEXT:    [[B:%.*]] = lshr i43 [[A:%.*]], 23
492; CHECK-NEXT:    [[C:%.*]] = and i43 [[A]], -8388608
493; CHECK-NEXT:    [[D:%.*]] = mul i43 [[B]], [[C]]
494; CHECK-NEXT:    ret i43 [[D]]
495;
496  %B = lshr i43 %A, 23
497  %C = shl i43 %B, 23
498  %D = mul i43 %B, %C
499  ret i43 %D
500}
501
502; Fold vector shl (lshr X, C), C -> and X, C' regardless of the number of uses of the lshr.
503
504define <2 x i43> @lshr_shl_eq_amt_multi_use_splat_vec(<2 x i43> %A) {
505; CHECK-LABEL: @lshr_shl_eq_amt_multi_use_splat_vec(
506; CHECK-NEXT:    [[B:%.*]] = lshr <2 x i43> [[A:%.*]], <i43 23, i43 23>
507; CHECK-NEXT:    [[C:%.*]] = and <2 x i43> [[A]], <i43 -8388608, i43 -8388608>
508; CHECK-NEXT:    [[D:%.*]] = mul <2 x i43> [[B]], [[C]]
509; CHECK-NEXT:    ret <2 x i43> [[D]]
510;
511  %B = lshr <2 x i43> %A, <i43 23, i43 23>
512  %C = shl <2 x i43> %B, <i43 23, i43 23>
513  %D = mul <2 x i43> %B, %C
514  ret <2 x i43> %D
515}
516
517define i37 @test25(i37 %AA, i37 %BB) {
518; CHECK-LABEL: @test25(
519; CHECK-NEXT:    [[D:%.*]] = and i37 [[AA:%.*]], -131072
520; CHECK-NEXT:    [[C2:%.*]] = add i37 [[D]], [[BB:%.*]]
521; CHECK-NEXT:    [[F:%.*]] = and i37 [[C2]], -131072
522; CHECK-NEXT:    ret i37 [[F]]
523;
524  %C = lshr i37 %BB, 17
525  %D = lshr i37 %AA, 17
526  %E = add i37 %D, %C
527  %F = shl i37 %E, 17
528  ret i37 %F
529}
530
531define i40 @test26(i40 %A) {
532; CHECK-LABEL: @test26(
533; CHECK-NEXT:    [[B:%.*]] = and i40 [[A:%.*]], -2
534; CHECK-NEXT:    ret i40 [[B]]
535;
536  %B = lshr i40 %A, 1
537  %C = bitcast i40 %B to i40
538  %D = shl i40 %C, 1
539  ret i40 %D
540}
541
542; OSS-Fuzz #9880
543; https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=9880
544define i177 @ossfuzz_9880(i177 %X) {
545; CHECK-LABEL: @ossfuzz_9880(
546; CHECK-NEXT:    [[A:%.*]] = alloca i177, align 8
547; CHECK-NEXT:    [[L1:%.*]] = load i177, i177* [[A]], align 8
548; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i177 [[L1]], -1
549; CHECK-NEXT:    [[B5_NEG:%.*]] = sext i1 [[TMP1]] to i177
550; CHECK-NEXT:    [[B14:%.*]] = add i177 [[L1]], [[B5_NEG]]
551; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i177 [[B14]], -1
552; CHECK-NEXT:    [[B1:%.*]] = zext i1 [[TMP2]] to i177
553; CHECK-NEXT:    ret i177 [[B1]]
554;
555  %A = alloca i177
556  %L1 = load i177, i177* %A
557  %B = or i177 0, -1
558  %B5 = udiv i177 %L1, %B
559  %B4 = add i177 %B5, %B
560  %B2 = add i177 %B, %B4
561  %B6 = mul i177 %B5, %B2
562  %B20 = shl i177 %L1, %B6
563  %B14 = sub i177 %B20, %B5
564  %B1 = udiv i177 %B14, %B6
565  ret i177 %B1
566}
567