13978f37cSDhruv Chawla; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2 2*0f152a55SDhruv Chawla; RUN: opt -S < %s -passes=infer-alignment | FileCheck %s 33978f37cSDhruv Chawla 43978f37cSDhruv Chawla; ------------------------------------------------------------------------------ 53978f37cSDhruv Chawla; load/store of null 63978f37cSDhruv Chawla; ------------------------------------------------------------------------------ 73978f37cSDhruv Chawla 83978f37cSDhruv Chawladefine void @load_null() { 93978f37cSDhruv Chawla; CHECK-LABEL: define void @load_null() { 10*0f152a55SDhruv Chawla; CHECK-NEXT: [[X_0:%.*]] = load atomic i32, ptr null unordered, align 4294967296 11*0f152a55SDhruv Chawla; CHECK-NEXT: [[X_1:%.*]] = load atomic i32, ptr null monotonic, align 4294967296 12*0f152a55SDhruv Chawla; CHECK-NEXT: [[X_2:%.*]] = load atomic i32, ptr null seq_cst, align 4294967296 133978f37cSDhruv Chawla; CHECK-NEXT: ret void 143978f37cSDhruv Chawla; 153978f37cSDhruv Chawla %x.0 = load atomic i32, ptr null unordered, align 4 163978f37cSDhruv Chawla %x.1 = load atomic i32, ptr null monotonic, align 4 173978f37cSDhruv Chawla %x.2 = load atomic i32, ptr null seq_cst, align 4 183978f37cSDhruv Chawla ret void 193978f37cSDhruv Chawla} 203978f37cSDhruv Chawla 213978f37cSDhruv Chawladefine void @store_null() { 223978f37cSDhruv Chawla; CHECK-LABEL: define void @store_null() { 23*0f152a55SDhruv Chawla; CHECK-NEXT: store atomic i32 0, ptr null unordered, align 4294967296 24*0f152a55SDhruv Chawla; CHECK-NEXT: store atomic i32 0, ptr null monotonic, align 4294967296 25*0f152a55SDhruv Chawla; CHECK-NEXT: store atomic i32 0, ptr null seq_cst, align 4294967296 263978f37cSDhruv Chawla; CHECK-NEXT: ret void 273978f37cSDhruv Chawla; 283978f37cSDhruv Chawla store atomic i32 0, ptr null unordered, align 4 293978f37cSDhruv Chawla store atomic i32 0, ptr null monotonic, align 4 303978f37cSDhruv Chawla store atomic i32 0, ptr null seq_cst, align 4 313978f37cSDhruv Chawla ret void 323978f37cSDhruv Chawla} 333978f37cSDhruv Chawla 343978f37cSDhruv Chawla; ------------------------------------------------------------------------------ 353978f37cSDhruv Chawla; load/store of global 363978f37cSDhruv Chawla; ------------------------------------------------------------------------------ 373978f37cSDhruv Chawla@c = global i64 42 383978f37cSDhruv Chawla 393978f37cSDhruv Chawladefine void @load_nonnull() { 403978f37cSDhruv Chawla; CHECK-LABEL: define void @load_nonnull() { 41*0f152a55SDhruv Chawla; CHECK-NEXT: [[X_0:%.*]] = load atomic i32, ptr @c unordered, align 8 42*0f152a55SDhruv Chawla; CHECK-NEXT: [[X_1:%.*]] = load atomic i32, ptr @c monotonic, align 8 43*0f152a55SDhruv Chawla; CHECK-NEXT: [[X_2:%.*]] = load atomic i32, ptr @c seq_cst, align 8 443978f37cSDhruv Chawla; CHECK-NEXT: ret void 453978f37cSDhruv Chawla; 463978f37cSDhruv Chawla %x.0 = load atomic i32, ptr @c unordered, align 4 473978f37cSDhruv Chawla %x.1 = load atomic i32, ptr @c monotonic, align 4 483978f37cSDhruv Chawla %x.2 = load atomic i32, ptr @c seq_cst, align 4 493978f37cSDhruv Chawla ret void 503978f37cSDhruv Chawla} 513978f37cSDhruv Chawla 523978f37cSDhruv Chawladefine void @store_nonnull() { 533978f37cSDhruv Chawla; CHECK-LABEL: define void @store_nonnull() { 54*0f152a55SDhruv Chawla; CHECK-NEXT: store atomic i32 0, ptr @c unordered, align 8 55*0f152a55SDhruv Chawla; CHECK-NEXT: store atomic i32 0, ptr @c monotonic, align 8 56*0f152a55SDhruv Chawla; CHECK-NEXT: store atomic i32 0, ptr @c seq_cst, align 8 573978f37cSDhruv Chawla; CHECK-NEXT: ret void 583978f37cSDhruv Chawla; 593978f37cSDhruv Chawla store atomic i32 0, ptr @c unordered, align 4 603978f37cSDhruv Chawla store atomic i32 0, ptr @c monotonic, align 4 613978f37cSDhruv Chawla store atomic i32 0, ptr @c seq_cst, align 4 623978f37cSDhruv Chawla ret void 633978f37cSDhruv Chawla} 643978f37cSDhruv Chawla 653978f37cSDhruv Chawla; ------------------------------------------------------------------------------ 663978f37cSDhruv Chawla; load/store of alloca 673978f37cSDhruv Chawla; ------------------------------------------------------------------------------ 683978f37cSDhruv Chawla 693978f37cSDhruv Chawladefine void @load_alloca() { 703978f37cSDhruv Chawla; CHECK-LABEL: define void @load_alloca() { 713978f37cSDhruv Chawla; CHECK-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4 72*0f152a55SDhruv Chawla; CHECK-NEXT: [[X_0:%.*]] = load atomic i32, ptr [[ALLOCA]] unordered, align 4 73*0f152a55SDhruv Chawla; CHECK-NEXT: [[X_1:%.*]] = load atomic i32, ptr [[ALLOCA]] monotonic, align 4 74*0f152a55SDhruv Chawla; CHECK-NEXT: [[X_2:%.*]] = load atomic i32, ptr [[ALLOCA]] seq_cst, align 4 753978f37cSDhruv Chawla; CHECK-NEXT: ret void 763978f37cSDhruv Chawla; 773978f37cSDhruv Chawla %alloca = alloca i32 783978f37cSDhruv Chawla %x.0 = load atomic i32, ptr %alloca unordered, align 1 793978f37cSDhruv Chawla %x.1 = load atomic i32, ptr %alloca monotonic, align 1 803978f37cSDhruv Chawla %x.2 = load atomic i32, ptr %alloca seq_cst, align 1 813978f37cSDhruv Chawla ret void 823978f37cSDhruv Chawla} 833978f37cSDhruv Chawla 843978f37cSDhruv Chawladefine void @store_alloca() { 853978f37cSDhruv Chawla; CHECK-LABEL: define void @store_alloca() { 863978f37cSDhruv Chawla; CHECK-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4 87*0f152a55SDhruv Chawla; CHECK-NEXT: store atomic i32 0, ptr [[ALLOCA]] unordered, align 4 88*0f152a55SDhruv Chawla; CHECK-NEXT: store atomic i32 0, ptr [[ALLOCA]] monotonic, align 4 89*0f152a55SDhruv Chawla; CHECK-NEXT: store atomic i32 0, ptr [[ALLOCA]] seq_cst, align 4 903978f37cSDhruv Chawla; CHECK-NEXT: ret void 913978f37cSDhruv Chawla; 923978f37cSDhruv Chawla %alloca = alloca i32 933978f37cSDhruv Chawla store atomic i32 0, ptr %alloca unordered, align 1 943978f37cSDhruv Chawla store atomic i32 0, ptr %alloca monotonic, align 1 953978f37cSDhruv Chawla store atomic i32 0, ptr %alloca seq_cst, align 1 963978f37cSDhruv Chawla ret void 973978f37cSDhruv Chawla} 98