xref: /llvm-project/llvm/test/Transforms/InferAddressSpaces/AMDGPU/self-phi.ll (revision 5651af896c3df30da9edd101b1fb17c00de6636d)
17d6ca2ecSMatt Arsenault; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2*5651af89SMatt Arsenault; RUN: opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -S -passes=infer-address-spaces %s | FileCheck %s
37d6ca2ecSMatt Arsenault
4a982f095SMatt Arsenaultdefine amdgpu_kernel void @phi_self(ptr addrspace(1) %arg) {
57d6ca2ecSMatt Arsenault; CHECK-LABEL: @phi_self(
67d6ca2ecSMatt Arsenault; CHECK-NEXT:  entry:
77d6ca2ecSMatt Arsenault; CHECK-NEXT:    br label [[LOOP:%.*]]
87d6ca2ecSMatt Arsenault; CHECK:       loop:
9a982f095SMatt Arsenault; CHECK-NEXT:    [[I:%.*]] = phi ptr addrspace(1) [ [[I]], [[LOOP]] ], [ [[ARG:%.*]], [[ENTRY:%.*]] ]
10a982f095SMatt Arsenault; CHECK-NEXT:    [[I1:%.*]] = load i8, ptr addrspace(1) [[I]], align 1
117d6ca2ecSMatt Arsenault; CHECK-NEXT:    [[I2:%.*]] = icmp eq i8 [[I1]], 0
127d6ca2ecSMatt Arsenault; CHECK-NEXT:    br i1 [[I2]], label [[LOOP]], label [[RET:%.*]]
137d6ca2ecSMatt Arsenault; CHECK:       ret:
147d6ca2ecSMatt Arsenault; CHECK-NEXT:    ret void
157d6ca2ecSMatt Arsenault;
167d6ca2ecSMatt Arsenaultentry:
17a982f095SMatt Arsenault  %cast = addrspacecast ptr addrspace(1) %arg to ptr
187d6ca2ecSMatt Arsenault  br label %loop
197d6ca2ecSMatt Arsenault
207d6ca2ecSMatt Arsenaultloop:
21a982f095SMatt Arsenault  %i = phi ptr [%i, %loop], [%cast, %entry]
22a982f095SMatt Arsenault  %i1 = load i8, ptr %i, align 1
237d6ca2ecSMatt Arsenault  %i2 = icmp eq i8 %i1, 0
247d6ca2ecSMatt Arsenault  br i1 %i2, label %loop, label %ret
257d6ca2ecSMatt Arsenault
267d6ca2ecSMatt Arsenaultret:
277d6ca2ecSMatt Arsenault  ret void
287d6ca2ecSMatt Arsenault}
29