1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -S -passes=iroutliner -ir-outlining-no-cost < %s | FileCheck %s 3 4; These functions are constructed slightly differently so that they require 5; the same output blocks for the values used outside of the region. We are 6; checking that two output blocks are created with the same store instructions. 7 8define void @outline_outputs1() #0 { 9; CHECK-LABEL: @outline_outputs1( 10; CHECK-NEXT: entry: 11; CHECK-NEXT: [[DOTLOC:%.*]] = alloca i32, align 4 12; CHECK-NEXT: [[ADD_LOC:%.*]] = alloca i32, align 4 13; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4 14; CHECK-NEXT: [[B:%.*]] = alloca i32, align 4 15; CHECK-NEXT: [[OUTPUT:%.*]] = alloca i32, align 4 16; CHECK-NEXT: [[RESULT:%.*]] = alloca i32, align 4 17; CHECK-NEXT: [[LT_CAST:%.*]] = bitcast i32* [[ADD_LOC]] to i8* 18; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 -1, i8* [[LT_CAST]]) 19; CHECK-NEXT: [[LT_CAST1:%.*]] = bitcast i32* [[DOTLOC]] to i8* 20; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 -1, i8* [[LT_CAST1]]) 21; CHECK-NEXT: call void @outlined_ir_func_0(i32* [[A]], i32* [[B]], i32* [[OUTPUT]], i32* [[ADD_LOC]], i32* [[DOTLOC]]) 22; CHECK-NEXT: [[ADD_RELOAD:%.*]] = load i32, i32* [[ADD_LOC]], align 4 23; CHECK-NEXT: [[DOTRELOAD:%.*]] = load i32, i32* [[DOTLOC]], align 4 24; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 -1, i8* [[LT_CAST]]) 25; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 -1, i8* [[LT_CAST1]]) 26; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[OUTPUT]], align 4 27; CHECK-NEXT: call void @outlined_ir_func_1(i32 [[DOTRELOAD]], i32 [[ADD_RELOAD]], i32* [[RESULT]]) 28; CHECK-NEXT: ret void 29; 30entry: 31 %a = alloca i32, align 4 32 %b = alloca i32, align 4 33 %output = alloca i32, align 4 34 %result = alloca i32, align 4 35 store i32 2, i32* %a, align 4 36 store i32 3, i32* %b, align 4 37 %0 = load i32, i32* %a, align 4 38 %1 = load i32, i32* %b, align 4 39 %add = add i32 %0, %1 40 store i32 %add, i32* %output, align 4 41 %2 = load i32, i32* %output, align 4 42 %3 = load i32, i32* %output, align 4 43 %mul = mul i32 %2, %add 44 store i32 %mul, i32* %result, align 4 45 ret void 46} 47 48define void @outline_outputs2() #0 { 49; CHECK-LABEL: @outline_outputs2( 50; CHECK-NEXT: entry: 51; CHECK-NEXT: [[DOTLOC:%.*]] = alloca i32, align 4 52; CHECK-NEXT: [[ADD_LOC:%.*]] = alloca i32, align 4 53; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4 54; CHECK-NEXT: [[B:%.*]] = alloca i32, align 4 55; CHECK-NEXT: [[OUTPUT:%.*]] = alloca i32, align 4 56; CHECK-NEXT: [[RESULT:%.*]] = alloca i32, align 4 57; CHECK-NEXT: [[LT_CAST:%.*]] = bitcast i32* [[ADD_LOC]] to i8* 58; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 -1, i8* [[LT_CAST]]) 59; CHECK-NEXT: [[LT_CAST1:%.*]] = bitcast i32* [[DOTLOC]] to i8* 60; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 -1, i8* [[LT_CAST1]]) 61; CHECK-NEXT: call void @outlined_ir_func_0(i32* [[A]], i32* [[B]], i32* [[OUTPUT]], i32* [[ADD_LOC]], i32* [[DOTLOC]]) 62; CHECK-NEXT: [[ADD_RELOAD:%.*]] = load i32, i32* [[ADD_LOC]], align 4 63; CHECK-NEXT: [[DOTRELOAD:%.*]] = load i32, i32* [[DOTLOC]], align 4 64; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 -1, i8* [[LT_CAST]]) 65; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 -1, i8* [[LT_CAST1]]) 66; CHECK-NEXT: call void @outlined_ir_func_1(i32 [[DOTRELOAD]], i32 [[ADD_RELOAD]], i32* [[RESULT]]) 67; CHECK-NEXT: ret void 68; 69entry: 70 %a = alloca i32, align 4 71 %b = alloca i32, align 4 72 %output = alloca i32, align 4 73 %result = alloca i32, align 4 74 store i32 2, i32* %a, align 4 75 store i32 3, i32* %b, align 4 76 %0 = load i32, i32* %a, align 4 77 %1 = load i32, i32* %b, align 4 78 %add = add i32 %0, %1 79 store i32 %add, i32* %output, align 4 80 %2 = load i32, i32* %output, align 4 81 %mul = mul i32 %2, %add 82 store i32 %mul, i32* %result, align 4 83 ret void 84} 85 86; CHECK: define internal void @outlined_ir_func_0(i32* [[ARG0:%.*]], i32* [[ARG1:%.*]], i32* [[ARG2:%.*]], i32* [[ARG3:%.*]], i32* [[ARG4:%.*]]) #1 { 87; CHECK: entry_to_outline: 88; CHECK-NEXT: store i32 2, i32* [[ARG0]], align 4 89; CHECK-NEXT: store i32 3, i32* [[ARG1]], align 4 90; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARG0]], align 4 91; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARG1]], align 4 92; CHECK-NEXT: [[ADD:%.*]] = add i32 [[TMP0]], [[TMP1]] 93; CHECK-NEXT: store i32 [[ADD]], i32* [[ARG2]], align 4 94; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARG2]], align 4 95 96; CHECK: entry_after_outline.exitStub: 97; CHECK-NEXT: store i32 [[ADD]], i32* [[ARG3]], align 4 98; CHECK-NEXT: store i32 [[TMP2]], i32* [[ARG4]], align 4 99