xref: /llvm-project/llvm/test/Transforms/IROutliner/outlining-across-branch.ll (revision f4b925ee7078f058602fd323e25f45f1ae91ca34)
181d3ac0cSAndrew Litteken; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs
29dd9575cSRoman Lebedev; RUN: opt -S -passes=verify,iroutliner -ir-outlining-no-cost < %s | FileCheck %s
381d3ac0cSAndrew Litteken
481d3ac0cSAndrew Litteken; This checks that we are able to outline exactly the same branch structure
581d3ac0cSAndrew Litteken; while also outlining similar items on either side of the branch.
681d3ac0cSAndrew Litteken
781d3ac0cSAndrew Littekendefine void @outline_outputs1() #0 {
881d3ac0cSAndrew Littekenentry:
981d3ac0cSAndrew Litteken  %a = alloca i32, align 4
1081d3ac0cSAndrew Litteken  %b = alloca i32, align 4
1181d3ac0cSAndrew Litteken  %output = alloca i32, align 4
1281d3ac0cSAndrew Litteken  %result = alloca i32, align 4
1381d3ac0cSAndrew Litteken  %output2 = alloca i32, align 4
1481d3ac0cSAndrew Litteken  %result2 = alloca i32, align 4
15*f4b925eeSMatt Arsenault  store i32 2, ptr %a, align 4
16*f4b925eeSMatt Arsenault  store i32 3, ptr %b, align 4
1781d3ac0cSAndrew Litteken  br label %next
1881d3ac0cSAndrew Littekennext:
19*f4b925eeSMatt Arsenault  store i32 2, ptr %output, align 4
20*f4b925eeSMatt Arsenault  store i32 3, ptr %result, align 4
2181d3ac0cSAndrew Litteken  ret void
2281d3ac0cSAndrew Litteken}
2381d3ac0cSAndrew Litteken
2481d3ac0cSAndrew Littekendefine void @outline_outputs2() #0 {
2581d3ac0cSAndrew Littekenentry:
2681d3ac0cSAndrew Litteken  %a = alloca i32, align 4
2781d3ac0cSAndrew Litteken  %b = alloca i32, align 4
2881d3ac0cSAndrew Litteken  %output = alloca i32, align 4
2981d3ac0cSAndrew Litteken  %result = alloca i32, align 4
3081d3ac0cSAndrew Litteken  %output2 = alloca i32, align 4
3181d3ac0cSAndrew Litteken  %result2 = alloca i32, align 4
32*f4b925eeSMatt Arsenault  store i32 2, ptr %a, align 4
33*f4b925eeSMatt Arsenault  store i32 3, ptr %b, align 4
3481d3ac0cSAndrew Litteken  br label %next
3581d3ac0cSAndrew Littekennext:
36*f4b925eeSMatt Arsenault  store i32 2, ptr %output, align 4
37*f4b925eeSMatt Arsenault  store i32 3, ptr %result, align 4
3881d3ac0cSAndrew Litteken  ret void
3981d3ac0cSAndrew Litteken}
4081d3ac0cSAndrew Litteken; CHECK-LABEL: @outline_outputs1(
4181d3ac0cSAndrew Litteken; CHECK-NEXT:  entry:
4281d3ac0cSAndrew Litteken; CHECK-NEXT:    [[A:%.*]] = alloca i32, align 4
4381d3ac0cSAndrew Litteken; CHECK-NEXT:    [[B:%.*]] = alloca i32, align 4
4481d3ac0cSAndrew Litteken; CHECK-NEXT:    [[OUTPUT:%.*]] = alloca i32, align 4
4581d3ac0cSAndrew Litteken; CHECK-NEXT:    [[RESULT:%.*]] = alloca i32, align 4
4681d3ac0cSAndrew Litteken; CHECK-NEXT:    [[OUTPUT2:%.*]] = alloca i32, align 4
4781d3ac0cSAndrew Litteken; CHECK-NEXT:    [[RESULT2:%.*]] = alloca i32, align 4
48*f4b925eeSMatt Arsenault; CHECK-NEXT:    call void @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[OUTPUT]], ptr [[RESULT]])
4981d3ac0cSAndrew Litteken; CHECK-NEXT:    ret void
5081d3ac0cSAndrew Litteken;
5181d3ac0cSAndrew Litteken;
5281d3ac0cSAndrew Litteken; CHECK-LABEL: @outline_outputs2(
5381d3ac0cSAndrew Litteken; CHECK-NEXT:  entry:
5481d3ac0cSAndrew Litteken; CHECK-NEXT:    [[A:%.*]] = alloca i32, align 4
5581d3ac0cSAndrew Litteken; CHECK-NEXT:    [[B:%.*]] = alloca i32, align 4
5681d3ac0cSAndrew Litteken; CHECK-NEXT:    [[OUTPUT:%.*]] = alloca i32, align 4
5781d3ac0cSAndrew Litteken; CHECK-NEXT:    [[RESULT:%.*]] = alloca i32, align 4
5881d3ac0cSAndrew Litteken; CHECK-NEXT:    [[OUTPUT2:%.*]] = alloca i32, align 4
5981d3ac0cSAndrew Litteken; CHECK-NEXT:    [[RESULT2:%.*]] = alloca i32, align 4
60*f4b925eeSMatt Arsenault; CHECK-NEXT:    call void @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[OUTPUT]], ptr [[RESULT]])
6181d3ac0cSAndrew Litteken; CHECK-NEXT:    ret void
6281d3ac0cSAndrew Litteken;
6381d3ac0cSAndrew Litteken;
6481d3ac0cSAndrew Litteken; CHECK: define internal void @outlined_ir_func_0(
6581d3ac0cSAndrew Litteken; CHECK:  newFuncRoot:
6681d3ac0cSAndrew Litteken; CHECK-NEXT:    br label [[ENTRY_TO_OUTLINE:%.*]]
6781d3ac0cSAndrew Litteken; CHECK:       entry_to_outline:
68*f4b925eeSMatt Arsenault; CHECK-NEXT:    store i32 2, ptr [[TMP0:%.*]], align 4
69*f4b925eeSMatt Arsenault; CHECK-NEXT:    store i32 3, ptr [[TMP1:%.*]], align 4
7081d3ac0cSAndrew Litteken; CHECK-NEXT:    br label [[NEXT:%.*]]
7181d3ac0cSAndrew Litteken; CHECK:       next:
72*f4b925eeSMatt Arsenault; CHECK-NEXT:    store i32 2, ptr [[TMP2:%.*]], align 4
73*f4b925eeSMatt Arsenault; CHECK-NEXT:    store i32 3, ptr [[TMP3:%.*]], align 4
7481d3ac0cSAndrew Litteken; CHECK-NEXT:    br label [[ENTRY_AFTER_OUTLINE_EXITSTUB:%.*]]
7581d3ac0cSAndrew Litteken; CHECK:       entry_after_outline.exitStub:
7681d3ac0cSAndrew Litteken; CHECK-NEXT:    ret void
7781d3ac0cSAndrew Litteken;
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